CPUID: Difference between revisions
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→Checking CPUID availability: increase comment quality |
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<source lang="asm"> |
<source lang="asm"> |
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pushfd ; preserve EFLAGS to restore at the end of routine |
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pushfd ; store EFLAGS (working copy) |
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xor dword [esp], 0x00200000 ; invert ID bit in our copy of EFLAGS |
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popfd ; attempt storing _altered_ EFLAGS |
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pop eax ;eax = modified EFLAGS (ID bit may or may not be inverted) |
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pushfd ; Store EFLAGS again (ID bit may or may not be inverted) |
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pop eax ; eax = modified EFLAGS (ID bit may or may not be inverted) |
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xor eax, [esp] ; eax = whichever bits were changed |
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and eax, 0x00200000 ; eax = zero if ID bit can't be changed, else non-zero |
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</source> |
</source> |
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Note 2: You can simply attempt to execute the CPUID instruction and see if you get an invalid opcode exception. This avoids problems with CPUs that do support CPUID but don't support the ID bit in EFLAGS; and is likely to be faster for CPUs that do support CPUID (and slower for CPUs that don't). |
Note 2: You can simply attempt to execute the CPUID instruction and see if you get an invalid opcode exception. This avoids problems with CPUs that do support CPUID but don't support the ID bit in EFLAGS; and is likely to be faster for CPUs that do support CPUID (and slower for CPUs that don't). |
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=== Basic usage === |
=== Basic usage === |
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