CPUID: Difference between revisions

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→‎CPU Features: Updated features list
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enum {
/* Flags. */
CPUID_FEAT_ECX_SSE3 = 1 << 0,
#define CPUID_FLAG_FPU 0x1 /* Floating Point Unit. */
CPUID_FEAT_ECX_PCLMUL = 1 << 1,
#define CPUID_FLAG_VME 0x2 /* Virtual Mode Extensions. */
CPUID_FEAT_ECX_DTES64 = 1 << 2,
#define CPUID_FLAG_DE 0x4 /* Debugging Extensions. */
CPUID_FEAT_ECX_MONITOR = 1 << 3,
#define CPUID_FLAG_PSE 0x8 /* Page Size Extensions. */
CPUID_FEAT_ECX_DS_CPL = 1 << 4,
#define CPUID_FLAG_TSC 0x10 /* Time Stamp Counter. */
CPUID_FEAT_ECX_VMX = 1 << 5,
#define CPUID_FLAG_MSR 0x20 /* Model-specific registers. */
CPUID_FEAT_ECX_SMX = 1 << 6,
#define CPUID_FLAG_PAE 0x40 /* Physical Address Extensions. */
CPUID_FEAT_ECX_EST = 1 << 7,
#define CPUID_FLAG_MCE 0x80 /* Machine Check Exceptions. */
CPUID_FEAT_ECX_TM2 = 1 << 8,
#define CPUID_FLAG_CXCHG8 0x100 /* Compare and exchange 8-byte. */
CPUID_FEAT_ECX_SSSE3 = 1 << 9,
#define CPUID_FLAG_APIC 0x200 /* On-chip APIC. */
CPUID_FEAT_ECX_CID = 1 << 10,
#define CPUID_FLAG_SEP 0x800 /* Fast System Calls. */
CPUID_FEAT_ECX_FMA = 1 << 12,
#define CPUID_FLAG_MTRR 0x1000 /* Memory Type Range Registers.*/
CPUID_FEAT_ECX_CX16 = 1 << 13,
#define CPUID_FLAG_PGE 0x2000 /* Page Global Enable.*/
CPUID_FEAT_ECX_ETPRD = 1 << 14,
#define CPUID_FLAG_MCA 0x4000 /* Machine Check Architecture. */
CPUID_FEAT_ECX_PDCM = 1 << 15,
#define CPUID_FLAG_CMOV 0x8000 /* Conditional move-instruction. */
CPUID_FEAT_ECX_DCA = 1 << 18,
#define CPUID_FLAG_PAT 0x10000 /* Page Attribute Table. */
CPUID_FEAT_ECX_SSE4_1 = 1 << 19,
#define CPUID_FLAG_PSE36 0x20000 /* 36-bit Page Size Extensions. */
CPUID_FEAT_ECX_SSE4_2 = 1 << 20,
#define CPUID_FLAG_PSN 0x40000 /* Processor Serial Number. */
CPUID_FEAT_ECX_x2APIC = 1 << 21,
#define CPUID_FLAG_CLFL 0x80000 /* CLFLUSH - fixme? */
CPUID_FEAT_ECX_MOVBE = 1 << 22,
#define CPUID_FLAG_DTES 0x200000 /* Debug Trace and EMON Store MSRs. */
CPUID_FEAT_ECX_POPCNT = 1 << 23,
#define CPUID_FLAG_ACPI 0x400000 /* Thermal Cotrol MSR. */
CPUID_FEAT_ECX_XSAVE = 1 << 26,
#define CPUID_FLAG_MMX 0x800000 /* MMX instruction set. */
CPUID_FEAT_ECX_OSXSAVE = 1 << 27,
#define CPUID_FLAG_FXSR 0x1000000 /* Fast floating point save/restore. */
CPUID_FEAT_ECX_AVX = 1 << 28,
#define CPUID_FLAG_SSE 0x2000000 /* SSE (Streaming SIMD Extensions) */

#define CPUID_FLAG_SSE2 0x4000000 /* SSE2 (Streaming SIMD Extensions - #2) */
#define CPUID_FLAG_SS 0x8000000 /* Selfsnoop. */
CPUID_FEAT_EDX_FPU = 1 << 0,
CPUID_FEAT_EDX_VME = 1 << 1,
#define CPUID_FLAG_HTT 0x10000000 /* Hyper-Threading Technology. */
CPUID_FEAT_EDX_DE = 1 << 2,
#define CPUID_FLAG_TM1 0x20000000 /* Thermal Interrupts, Status MSRs. */
CPUID_FEAT_EDX_PSE = 1 << 3,
#define CPUID_FLAG_IA64 0x40000000 /* IA-64 (64-bit Intel CPU) */
CPUID_FEAT_EDX_TSC = 1 << 4,
#define CPUID_FLAG_PBE 0x80000000 /* Pending Break Event. */
CPUID_FEAT_EDX_MSR = 1 << 5,
CPUID_FEAT_EDX_PAE = 1 << 6,
CPUID_FEAT_EDX_MCE = 1 << 7,
CPUID_FEAT_EDX_CX8 = 1 << 8,
CPUID_FEAT_EDX_APIC = 1 << 9,
CPUID_FEAT_EDX_SEP = 1 << 11,
CPUID_FEAT_EDX_MTRR = 1 << 12,
CPUID_FEAT_EDX_PGE = 1 << 13,
CPUID_FEAT_EDX_MCA = 1 << 14,
CPUID_FEAT_EDX_CMOV = 1 << 15,
CPUID_FEAT_EDX_PAT = 1 << 16,
CPUID_FEAT_EDX_PSE36 = 1 << 17,
CPUID_FEAT_EDX_PSN = 1 << 18,
CPUID_FEAT_EDX_CLF = 1 << 19,
CPUID_FEAT_EDX_DTES = 1 << 21,
CPUID_FEAT_EDX_ACPI = 1 << 22,
CPUID_FEAT_EDX_MMX = 1 << 23,
CPUID_FEAT_EDX_FXSR = 1 << 24,
CPUID_FEAT_EDX_SSE = 1 << 25,
CPUID_FEAT_EDX_SSE2 = 1 << 26,
CPUID_FEAT_EDX_SS = 1 << 27,
CPUID_FEAT_EDX_HTT = 1 << 28,
CPUID_FEAT_EDX_TM1 = 1 << 29,
CPUID_FEAT_EDX_IA64 = 1 << 30,
CPUID_FEAT_EDX_PBE = 1 << 31
};
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Retrieved from "https://osdev.wiki/wiki/CPUID"