Brokenthorn's Known Bugs: Difference between revisions
[unchecked revision] | [unchecked revision] |
mNo edit summary |
m Add to FAQ. |
||
(3 intermediate revisions by 2 users not shown) | |||
Line 1: | Line 1: | ||
[[Category:FAQ]]Brokenthorn's tutorials are some of the better OSDev tutorials out there. They teach better coding practices, and go very in depth. Like all tutorials, there are a few bugs in it. Here are the most prevalent: |
|||
⚫ | |||
==Wrong description of CR0.PE== |
|||
In OSDev8, CR0.PE (bit 0) is incorrectly described as setting the processor to 32-bit mode. Setting bit 0 of CR0 does not put the processor in 32-bit mode. Performing a far jump to a 32-bit code segment puts the processor in 32-bit mode. The far jump itself will still be executed in 16-bit mode. |
|||
⚫ | |||
In OSDev15, the provided ISR handler uses inline asm to iretd from a C function: |
In OSDev15, the provided ISR handler uses inline asm to iretd from a C function: |
||
<syntaxhighlight lang="C"> |
<syntaxhighlight lang="C"> |
||
Line 15: | Line 20: | ||
This makes assumptions about the calling conventions used, and isn't a good idea in general. Better options may be found [[Interrupt_Service_Routines|here]]. |
This makes assumptions about the calling conventions used, and isn't a good idea in general. Better options may be found [[Interrupt_Service_Routines|here]]. |
||
==Missing semicolon== |
|||
In OSDevPE, there is a missing semicolon in the IMAGE_THUNK_DATA structure |
|||
==Issues with paging code== |
|||
In OSDev18, the paging code has some issues. It directly accesses physical memory without mapping it. You can use it as a base, but implement recursive paging. |
Latest revision as of 22:05, 1 September 2020
Brokenthorn's tutorials are some of the better OSDev tutorials out there. They teach better coding practices, and go very in depth. Like all tutorials, there are a few bugs in it. Here are the most prevalent:
Wrong description of CR0.PE
In OSDev8, CR0.PE (bit 0) is incorrectly described as setting the processor to 32-bit mode. Setting bit 0 of CR0 does not put the processor in 32-bit mode. Performing a far jump to a 32-bit code segment puts the processor in 32-bit mode. The far jump itself will still be executed in 16-bit mode.
iret using inline ASM
In OSDev15, the provided ISR handler uses inline asm to iretd from a C function:
void int_handler_5 () {
_asm add esp, 12
_asm pushad
// do whatever...
_asm popad
_asm iretd
}
This makes assumptions about the calling conventions used, and isn't a good idea in general. Better options may be found here.
Missing semicolon
In OSDevPE, there is a missing semicolon in the IMAGE_THUNK_DATA structure
Issues with paging code
In OSDev18, the paging code has some issues. It directly accesses physical memory without mapping it. You can use it as a base, but implement recursive paging.