AVX

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Advanced Vector Extensions is a SIMD (Single Instruction, Multiple Data) instruction set introduced by Intel in 2011.

OS Support

AVX need to be enabled by the kernel before being used. Forgetting to do this will raise an #UD on the first AVX call. Both SSE and OSXSAVE must be enabled before allowing. Failing to do so will also produce an #UD.

AVX is enabled by setting bit 2 of the XCR0 register. Bit 1 of XCR0 must also be set (indicating SSE support).

Here is an example of assembly code enabling SSE and AVX :

enable_avx:
    push rax
    push rbx
    push rcx
    push rdx

    mov rax, cr0
    and ax, 0xFFFB
    or ax, 0x2
    mov cr0, rax

    mov rax, cr4
    or ax, 3 << 9
    or eax, 1 << 18
    mov cr4, rax

    xor rcx, rcx
    xgetbv
    or eax, 7
    xsetbv

    pop rdx
    pop rcx
    pop rbx
    pop rax
    ret