ATA PIO Mode: Difference between revisions

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===Registers===
===Registers===


An ATA bus typically has 9 I/O ports that control its behavior. For the primary bus, these I/O ports are 0x1F0 through 0x1F7 (the "I/O" ports), and 0x3F6 (the "Control" port). The values in this table are relative to the so-called I/O port base address. So a port offset of 1 actually means 0x1F0 + 1 = 0x1F1. This is done because the base address may vary depending on the hardware. Also, some of these I/O ports map to different registers based on whether they are being read from or written to. See the table below for usage details.
An ATA bus typically has ten I/O ports which control its behavior. For the primary bus, these I/O ports are usually 0x1F0 (the "I/O" port base) through 0x1F7 and 0x3F6 (the "Control" port base) through 0x3F7. For the secondary bus, they are usually 0x170 through 0x177 and 0x376 through 0x377. Some systems may have non-standard port locations for the ATA busses, in which case it may be helpful to consult the section on PCI to determine how to retrieve port addresses for various devices in the system.

The values in these tables are relative to the so-called port base; a port offset of 1 from the I/O port base actually refers to port 0x1F1 (0x1F0 + 1 = 0x1F1). This is done because the base port may vary depending on the hardware in any given system. Also, some of these I/O ports map to different registers based on whether they are being read from or written to.


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|-
|-
! Port Offset from
! Offset from
"I/O" base port
"I/O" base
! Direction
! Direction
! Function
! Function
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| W
| W
| Command Register
| Command Register
| Used to send commands.
| Used to send ATA commands to the device.
| 8-bit / 8-bit
| 8-bit / 8-bit
|-
|-
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{| {{wikitable}}
|-
|-
! Port Offset from
! Offset from
"Control" port
"Control" base
! Direction
! Direction
! Function
! Function
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| 0
| 0
| W
| W
| Command Register
| Device Control Register
| Used to send ATA commands to the device.
| Used to reset the bus or enable/disable interrupts.
| 8-bit / 8-bit
| 8-bit / 8-bit
|-
|-
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====Drive / Head Register====
====Drive / Head Register (I/O base + 6)====


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====Status Register====
====Status Register (I/O base + 7)====


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====Alternate Status Register====
====Alternate Status Register (Control base + 0)====


Reading the Device Control Register port gets you the value of the Alternate Status Register, instead.
Reading the Device Control Register port gets you the value of the Alternate Status Register, instead.
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====Device Control Register====
====Device Control Register (Control base + 0)====


There is an additional IO port that changes the behavior of each ATA bus, called the Device Control Register (on the Primary bus, port 0x3F6). Each ATA bus has its own Control Register.
There is an additional IO port that changes the behavior of each ATA bus, called the Device Control Register (on the Primary bus, port 0x3F6). Each ATA bus has its own Control Register.
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====Drive Address Register====
====Drive Address Register (Control base + 1)====


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