ARM Generic Timer: Difference between revisions
Jump to navigation
Jump to search
[unchecked revision] | [unchecked revision] |
Content added Content deleted
m (→Introduction) |
(Redirect to a more full bodied page which isn't RPi specific) |
||
Line 1: | Line 1: | ||
#REDIRECT [[ARMv7 Generic Timers]] |
|||
{{Stub}} |
|||
== Introduction == |
|||
The '''ARM Generic Timer''' is a per-core implemented one-shot timer, built into the CPU (all Raspberry Pi models, memory mapped parts only on ARM Quad A7 CPUs, RPi2 and upwards). |
|||
Counters and frequency can be read using CNTP_CVAL (physical counter), CNTV_CVAL (virtual counter) and CNTP_FREQ (clock frequency) system registers. For IRQ routing, frequency setup and prescaler configuration the MMIO registers' address starts at 0x40000000. |
|||
This timer can operate on a CPU clock relative freqency (APB) and on a fixed crystal clock freqency (19.2MHz with a prescaler) as well, depending on configuration. |
|||
== See Also == |
|||
=== External Links === |
|||
* [https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile ARM Architecture Reference Manual] Chapters D8-D10 page D8-2264 (AArch64), Chapter G5 page G5-4851 (AArch32), Chapter I1 page I1-5856 and Chapters I3.5, I3.6 page I3-5946 (memory mapped parts) |
|||
* [https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836/QA7_rev3.4.pdf ARM Quad A7 Core] Section 4.3, Page 9 (refers to Generic Timer as "Core Timer Register") |
|||
[[Category:ARM]] |
Revision as of 03:53, 8 August 2019
Redirect to: