8259 PIC: Difference between revisions

===Common Definitions===

This is just a set of definitions common to the rest of this section. For the outb(), inb() and io_wait() functions, see [[Inline_Assembly/Examples#I/O_access|this page]].

#define PIC1 0x20 /* IO base address for master PIC */

#define PIC2 0xA0 /* IO base address for slave PIC */

#define PIC2_COMMAND PIC2

#define PIC2_DATA (PIC2+1)

 

===End of Interrupt===

Perhaps the most common command issued to the PIC chips is the ''end of interrupt'' (EOI) command (code 0x20). This is issued to the PIC chips at the end of an IRQ-based interrupt routine. If the IRQ came from the Master PIC, it is sufficient to issue this command only to the Master PIC; however if the IRQ came from the Slave PIC, it is necessary to issue the command to both PIC chips.

#define PIC_EOI 0x20 /* End-of-interrupt command code */

 

outb(PIC1_COMMAND,PIC_EOI);

}

 

===Initialisation===

* Gives additional information about the environment. (ICW4)

 

/* reinitialize the PIC controllers, giving them specified vector offsets

rather than 8 and 70, as configured by default */

outb(PIC2_DATA, a2);

}

 

''Note the presence of io_wait() calls, on older machines its necessary to give the PIC some time to react to commands as they might not be processed quickly''