X86-64 Instruction Encoding: Difference between revisions

[unchecked revision][unchecked revision]
(→‎Registers: Added x87 registers)
Line 12:
== Registers ==
The registers are encoded using the 4-bit values in the X.Reg column of the following table.
<div style="font-size: smaller">
{| {{wikitable}}
! X.Reg!! 8-bit GP!! 16-bit GP!! 32-bit GP!! 64-bit GP!! 80-bit x87!! 64-bit MMX!! 128-bit XMM!! 256-bit YMM!! 16-bit Segment!! 32-bit Control!! 32-bit Debug
Line 27 ⟶ 28:
| b0.101 (5)||CH, BPL<span style="vertical-align: super">[[#Table1Note1|1]]</span>||BP||EBP||RBP||FPR5||MMX5||XMM5||YMM5||GS||CR5||DR5
|-
| b0.110 (6)||DH, SIL<span style="vertical-align: super">[[#Table1Note1|1]]</span>||SI||ESI||RSI||FPR6||MMX6||XMM6||YMM6||invalid-||CR6||DR6
|-
| b0.111 (7)||BH, DIL<span style="vertical-align: super">[[#Table1Note1|1]]</span>||DI||EDI||RDI||FPR7||MMX7||XMM7||YMM7||invalid-||CR7||DR7
|-
| b1.000 (8)||R8L||R8W||R8D||R8||invalid-||MMX0||XMM8||YMM8||ES||CR8||DR8
|-
| b1.001 (9)||R9L||R9W||R9D||R9||invalid-||MMX1||XMM9||YMM9||CS||CR9||DR9
|-
| b1.010 (10)||R10L||R10W||R10D||R10||invalid-||MMX2||XMM10||YMM10||SS||CR10||DR10
|-
| b1.011 (11)||R11L||R11W||R11D||R11||invalid-||MMX3||XMM11||YMM11||DS||CR11||DR11
|-
| b1.100 (12)||R12L||R12W||R12D||R12||invalid-||MMX4||XMM12||YMM12||FS||CR12||DR12
|-
| b1.101 (13)||R13L||R13W||R13D||R13||invalid-||MMX5||XMM13||YMM13||GS||CR13||DR13
|-
| b1.110 (14)||R14L||R14W||R14D||R14||invalid-||MMX6||XMM14||YMM14||invalid-||CR14||DR14
|-
| b1.111 (15)||R15L||R15W||R15D||R15||invalid-||MMX7||XMM15||YMM15||invalid-||CR15||DR15
|}
</div>
<small id="Table1Note1">1: When any REX prefix is used, SPL, BPL, SIL and DIL are used. Otherwise, without any REX prefix AH, CH, DH and BH are used.</small>
 
Anonymous user