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X86-64 Instruction Encoding: Difference between revisions
→Registers: Added x87 registers
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(Fixed square brackets. An expression surrounded by square brackets means: take the value at the memory address of the value of the expression) |
(→Registers: Added x87 registers) |
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The registers are encoded using the 4-bit values in the X.Reg column of the following table.
{| {{wikitable}}
! X.Reg!! 8-bit GP!! 16-bit GP!! 32-bit GP!! 64-bit GP!! 80-bit x87!! 64-bit MMX!! 128-bit XMM!! 256-bit YMM!! 16-bit Segment!! 32-bit Control!! 32-bit Debug
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| b0.000 (0)||AL||AX||EAX||RAX||
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| b0.001 (1)||CL||CX||ECX||RCX||
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| b0.010 (2)||DL||DX||EDX||RDX||
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| b0.011 (3)||BL||BX||EBX||RBX||
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| b0.100 (4)||AH, SPL<span style="vertical-align: super">[[#Table1Note1|1]]</span>||SP||ESP||RSP||
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| b0.101 (5)||CH, BPL<span style="vertical-align: super">[[#Table1Note1|1]]</span>||BP||EBP||RBP||
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| b0.110 (6)||DH, SIL<span style="vertical-align: super">[[#Table1Note1|1]]</span>||SI||ESI||RSI||
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| b0.111 (7)||BH, DIL<span style="vertical-align: super">[[#Table1Note1|1]]</span>||DI||EDI||RDI||
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| b1.000 (8)||R8L||R8W||R8D||R8||
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| b1.001 (9)||R9L||R9W||R9D||R9||
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| b1.010 (10)||R10L||R10W||R10D||R10||
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| b1.011 (11)||R11L||R11W||R11D||R11||
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| b1.100 (12)||R12L||R12W||R12D||R12||
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| b1.101 (13)||R13L||R13W||R13D||R13||
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| b1.110 (14)||R14L||R14W||R14D||R14||
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| b1.111 (15)||R15L||R15W||R15D||R15||
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<small id="Table1Note1">1: When any REX prefix is used, SPL, BPL, SIL and DIL are used. Otherwise, without any REX prefix AH, CH, DH and BH are used.</small>
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