X86-64 Instruction Encoding: Difference between revisions

[unchecked revision][unchecked revision]
m (→‎32/64-bit addressing: Table nr fix)
Line 423:
! 00
| style="background-color: white" colspan="4"|[r/m]
| style="background-color: white" |[[#32-bit SIB byte|SIB]]
| style="background-color: white" |[&nbsp;[[#RIP.2FEIP-relative_addressing|RIP/EIP]]]<span style="vertical-align: super">[[#Table8Note1|1]],[[#Table8Note2|2]]</span>+disp32
| style="background-color: white" colspan="6"|[r/m]
| style="background-color: white" |[[#32-bit SIB byte|SIB]]
| style="background-color: white" |[&nbsp;[[#RIP.2FEIP-relative_addressing|RIP/EIP]]]<span style="vertical-align: super">[[#Table8Note1|1]],[[#Table8Note2|2]]</span>+disp32
| style="background-color: white" colspan="2"|[r/m]
Line 432:
! 01
| style="background-color: white" colspan="4"|[r/m]+disp8
| style="background-color: white" |[[#32-bit SIB byte|SIB]]+disp8
| style="background-color: white" colspan="7"|[r/m]+disp8
| style="background-color: white" |[[#32-bit SIB byte|SIB]]+disp8
| style="background-color: white" colspan="3"|[r/m]+disp8
|-
! 10
| style="background-color: white" colspan="4"|[r/m]+disp32
| style="background-color: white" |[[#32-bit SIB byte|SIB]]+disp32
| style="background-color: white" colspan="7"|[r/m]+disp32
| style="background-color: white" |[[#32-bit SIB byte|SIB]]+disp32
| style="background-color: white" colspan="3"|[r/m]+disp32
|-
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