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X86-64 Instruction Encoding: Difference between revisions

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X86-64 Instruction Encoding (view source)

Revision as of 14:05, 17 July 2012

931 bytes removed ,  11 years ago
→‎REX prefix: Moved to 'Opcode'
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VisualWikitext
(→‎Opcode: New version)
(→‎REX prefix: Moved to 'Opcode')
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NASM determines the operand size by looking at the ''MODRM.reg'' or (for a register) ''MODRM.rm'' fields. When they are both 32-bit, the operand size becomes 32-bit. Same for 16-bit and 64-bit. When they differ, an error occurs at compile time.
The address size is determined by looking at (for a memory operand) the ''MODRM.rm'' field, or the ''SIB.base'', ''SIB.index'' and displacement, in that order. So when ''SIB.base'' uses a 16-bit register (such as AX), the address size becomes 16-bit. Using a 32-bit displacement will result in the displacement being truncated.
 
== REX prefix ==
The REX prefix enabled 64-bit specific features. The layout is as follows:
<pre>
7 0
+---+---+---+---+---+---+---+---+
| 0 1 0 0 | w | r | x | b |
+---+---+---+---+---+---+---+---+
</pre>
* b0100 (4 bits)
* REX.w (1 bit)
* REX.r (1 bit)
* REX.x (1 bit)
* REX.b (1 bit)
 
=== REX.w ===
When this 1-bit value is 0, the default operand size is used (which is 32-bit for most but not all instructions, see [[#Operand-size and address-size override prefix|this table]]). When 1, a 64-bit operand size is used.
 
=== REX.r ===
This 1-bit value is an extension to the ''MODRM.reg'' field. See [[#Registers|Registers]].
 
=== REX.x ===
This 1-bit value is an extension to the ''SIB.index'' field. See [[#64-bit addressing|64-bit addressing]].
 
=== REX.b ===
This 1-bit value is an extension to the ''MODRM.rm'' field or the ''SIB.base'' field. See [[#64-bit addressing|64-bit addressing]].
 
== Opcode ==
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