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X86-64 Instruction Encoding: Difference between revisions
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{| {{wikitable}}
! Field
! Length
! Description
|-
| MODRM.mod||2 bits||In general, when this field is b11, then register-direct addressing mode is used; otherwise register-indirect addressing mode is used.
* A 3-bit opcode extension, which is used by some instructions but has no futher meaning other than distincting the instruction from other instructions. When ''/0'' through ''/7'' is specified at the opcode syntax, use that value as the value for the ''MODRM.reg'' field.▼
|-
* A 3-bit register reference, which can be used as the source or the destination of an instruction (depending on the instruction). This is the case when ''/r'' is specified at the opcode syntax. Which register is meant depends on the [[#Operand-size and address-size override prefix|operand-size]] of the instruction and the instruction itself. See the ''Value'' column of the following table for the possible values of the ''MODRM.reg'' field:▼
| MODRM.reg||3 bits||This field can have one of two values:
▲* A 3-bit opcode extension, which is used by some instructions but has no
▲* A 3-bit register reference, which can be used as the source or the destination of an instruction (depending on the instruction). This is the case when ''/r'' is specified at the opcode syntax. Which register is meant depends on the [[#Operand-size and address-size override prefix|operand-size]] of the instruction and the instruction itself. See [[#Registers|Registers]] for the
|-
| MODRM.rm||3 bits||Specifies a direct or indirect register operand, optionally with a displacement. The REX.B, VEX.~B or XOP.~B field extends this field with 1 most-significant bit to 4 bits total.
|}
==== Registers ====
| |||