X86-64: Difference between revisions

338 bytes removed ,  11 years ago
Fix ambiguous bits
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(Fix ambiguous bits)
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===What does Long Mode offer?===
 
Long mode extends general registers to 64 bits (RAX, RBX, RIP, RSP, RFLAGS, etc), and adds an additional 8 integer registers (R8, R9, ..., R15) plus 8 more SSE registers (XMM8 to XMM15) to the CPU. Linear addresses are extended to 64 bit (however, a given CPU may implement less than this) and the physical address space is extended to 52 bits (a given CPU may implement less than this). In essence long mode adds another mode to the CPU:.
* Real mode
* Legacy mode (32 bit protected mode)
* Long mode (64 bit protected mode)
* System Management mode
 
Long mode does not support hardware task switching or virtual 8086 tasks, and most of the segment register details are ignored (a flat memory model is required). In long mode the current CS determines if the code currently running is 64 bit code (true long mode) or 32 bit code (compatibility mode), or even 16-bit protected mode code (still in compatibility mode). Using paging has become mandatory, and segmentation has been stripped down for performance reasons.
 
The first 64 bit CPUs from both Intel and AMD support 40 bit physical addresses and 48 bit linear addresses.
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Additionally there is a long mode specific instruction called SWAPGS, which swaps the contents of GS.base and another MSR called KernelGSBase (C000_0102h). This instruction is particularly useful for preserving kernel information for a specific logical processor core across context switches. '''Note: This is an exchange operation'''.
 
Lastly it also important to note that any attempt to load a selector value into the FS or GS registers in long mode will automatically set their base addresses to zero, due to the previously mentioned semantics of long mode segmentation.
 
==Setting up==
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