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X86-64: Difference between revisions
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Fix lint errors
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Segmentation in long mode functions with a flat model with the exception of two registers: FS and GS. Setting the base address for these two segment registers is possible via two specific [[MSR|Model Specific Register (MSR)]]s, FS.base (C000_0100h) and GS.base (C000_0101h).
Additionally there is a long mode specific instruction called [[SWAPGS]], which swaps the contents of GS.base and another MSR called KernelGSBase (C000_0102h). This instruction is particularly useful for preserving kernel information for a specific logical processor core across context switches. '''Note: This is an exchange operation'''.
=== Further information ===
:''This feature overview is incomplete. Please see the [[http://en.wikipedia.org/wiki/X86-64 Wikipedia article on x86-64]] for more information.''
==Setting up==
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===How do I detect if the CPU is 64 bits ?===
After calling CPUID with EAX=0x80000001, all AMD64 compliant processors have the longmode-capable-bit turned on in the extended feature flags (bit 29) in EDX. There are also other bits required by long mode; you can check them out in the CPUID docs in the [http://support.amd.com/us/Processor_TechDocs/24594.pdf AMD general purpose instruction reference] (Link dead, the original author probably meant "AMD64 Architecture Programmer’s Manual Volume 3: General Purpose and System Instructions", found here: http://developer.amd.com/resources
===How do I enable Long Mode ?===
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* Disable paging
* Set the PAE enable bit in CR4
* Load CR3 with the physical address of the PML4 (Level 4 Page Map)
* Enable long mode by setting the
* Enable paging
''Reference: [https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.pdf Intel 64 and IA-32 Architectures Software Developer's Manual], Section 9.8.5''
Now the CPU will be in compatibility mode, and instructions are still 32-bit. To enter long mode, the D/B bit (bit 22, 2nd 32-bit value) of the GDT code segment must be clear (as it would be for a 16-bit code segment), and the L bit (bit 21, 2nd 32-bit value) of the GDT code segment must be set. Once that is done, the CPU is in 64-bit long mode.
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=== Text Segment Types ===
Another thing that you must keep in mind, that although the address space (and with it all the pointers) are 64 bit wide, the generated code in the text segment is most likely not. That's because by default gcc compiles to the "mov" instruction which has only 32 bit immediate. This means 64 bit programs are limited to 2G, just as 32 bit mode programs.
If you have ever seen an error message like this:
<syntaxhighlight lang="bash">
relocation truncated to fit: R_X86_64_32 against symbol
</syntaxhighlight>
then your code hit this barrier. For Assembly, you must use the "movabs" instruction instead of "mov", and for gcc you need to select a different text segment model with the "-mcmodel" argument.
{| {{wikitable}}
! Flag
! Text Segment Addressing
|-
| -mcmodel=small
| The program and its symbols must be linked in the lower 2 GB of the address space (this is the default model)
|-
| -mcmodel=large
| This model makes no assumptions about addresses and sizes of sections.
|-
| -mcmodel=medium
| The program is linked in the lower 2 GB of the address space. Small symbols are also placed there. Symbols with sizes larger than -mlarge-data-threshold are put into large data or bss sections and can be located above 2GB.
|-
| -mcmodel=kernel
| The kernel runs in the negative 2 GB of the address space. This model has to be used for Linux kernel code.
|}
It worth noting that code models are different for architectures, as they are tied with the instruction encoding. For example, AArch64 has a "-mcmodel=tiny" too, which allows 1M addressing, unknown to x86_64. And for AArch64 "-mcmodel=small" has a 4G limitation, not 2G as for the x86_64.
== See Also ==
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* [[EM64T|Intel EM64T]]
* [[Creating a 64-bit kernel]]
* [[BOOTBOOT|BOOTBOOT bootloader]]
* [[Limine|Limine bootloader]]
* [[X86-64 Instruction Encoding]]
* [[Setting_Up_Long_Mode|Setting up long mode]]
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[[Category:X86 CPU]]
[[Category:X86-64]]
[[Category:Operating Modes]]
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