VMX: Difference between revisions

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=== Executing VMXON ===
The main entry point for using VMX is through the VMXON instruction. The instruction requires a single operand of an m32 ora m64 region called an VMCS (Virtual-Machine Control Structure). The memory region needs to be size_t4096-byte aligned (Ibits use 160-byte11 alignment tomust be safe0) and the only VMCS field that should be modified is the VMCS revision identification field. This ID field should contain the value in bits 0-31 of MSR IA32_VMX_BASIC. In order to prepare a memory address in 32-bit PMode for use as an m64, some modifications need to be made. The upper 32-bits of the m64 have to be 0 or an "invalid memory address" error will occur and a VMEXIT will be called.
uint32_t * region = (uint32_t *)allocate_4k_aligned(4096);
uint64_t region64 = (uint64_t)((size_t)(region) & 0xFFFFFFFF);
asm volatile(" vmxon %0; "::"m" (region64));
 
This general process of taking a 32-bit memory address and turning it into a psuedo-64bit int (unsigned long long) will be used for all m64 operands later. VMCLEAR is another example instruction that requires the upper 32-bits of a memory address to be 0.
 
== References ==
Intel's SDM 3B: http://www.intel.com/Assets/PDF/manual/253669.pdf
Intel's SDM 2B: http://www.intel.com/Assets/PDF/manual/253667.pdf
KVM's VMX.c (GPLv2): http://lxr.free-electrons.com/source/arch/x86/kvm/vmx.c
 
BOCHS's VMX.c (LGPLv2): http://bochs.cvs.sourceforge.net/viewvc/bochs/bochs/cpu/vmx.cc
[[Category:X86]]
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