VGA Hardware: Difference between revisions
added sequencer shift modes
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Things that still need to be done:
* I need to reverse engineer more documentation for the sequencer.
* I need to test some additional GC bits for effects.
* Read Modes 0 and 1, Write modes 1,2,3 (this is easy as this documentation is rather complete. I Have not tested all details of this stuff)
* DAC Mask Register (the latest spec doesnt document it)
* Color Logic (There's more to this than the eye meets. I can write this from info out of Abrash's book, but i should still test it anyway. (It partially depends on the Sequencer)
*
- [[User:Combuster|Combuster]]
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Port 0x3D4 has some extra requirements - it requires bit 0 of the '''Miscellaneous Output Register''' to be set before it responds to this address (if cleared, these ports appears at 0x3B4). Also, registers 0-7 of 0x3D4 are write protected by the protect bit (bit 7 of index 0x11)
=== Port 0x3C6 ===
Port 0x3C6 only contains the DAC Mask Register, which can easily be accessed by a simple read/write operation on this port. Under normal conditions it should contain 0xff.
=== Port 0x3C8 ===
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The Sequencer is responsible to convert video memory to color indexes.
The Sequencer either operates in text (alphanumeric) mode or graphics mode
=== Alphanumeric Mode ===
'''TODO'''
=== Graphics Mode ===
In graphics mode, operations can be divided into two steps: address computation and shift logic. The sequencer computes an address, then reads out the four planes from that address, and generates 8 pixels from these values.
The shift logic has three operating modes: single, interleaved and 256-color shift. Although the VGA 'supports' various color depths, these are basically varations on 16-color modes.
'''TODO: address calculation'''
==== Single shift mode ====
This mode is used in 16 color modes. For each pixel, one bit is popped off each plane and put together to form the value of a pixel.
An example is given in [[VGA Hardware#Memory Layout in 16-color graphics modes|Memory Layout in 16-color graphics modes]]
==== Interleaved Shift Mode ====
This mode makes 4-color modes relatively easy: 2 bits are popped off the most significant side of plane 0. The same is done with plane 2, which become the most significant bits (in 4-color modes, these are zero) After 4 pixels being popped from planes 0 and 2, the same is done with plane 1 and 3, until all 8 pixels have been generated.
==== 256-Color Shift Mode ====
This mode causes 4 bits to be popped of each time. Plane 0 gives the first two pixels, Plane 1 the next two and so on. However, it is not defined in which order this happens. Because this mode is normally used solely in 256-color modes where the color logic will merge two 4-bits pixels together to form one 8-bit pixel, the communication inbetween is acertain. However, the bits can only be shifted out one of two possible sides, and supporting two possibilities can be overseen. Another problem to this method is, you can not detect which method is used without user intervention or keeping a list. Either way, this method either shifts left (from the msb) or right (from the lsb).
'''TODO: 256-color Shift Mode is more tricky than this, I have to run a few more tests to see what is going on. One should be able to create a linear 16-color mode based on this'''
== Color Logic ==
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