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The VGA is a complex piece of hardware. Even though it's old, many modern graphics cards are compatible with it, including NVidia and ATI cards. This can make writing a VGA driver rather attractive. The amount of compatibility varies however, so never assume a card is compatible without proper hardware detection. ▼
Apart from real machines, several emulators and virtual machines provide VGA emulation: [[Bochs]], [[QEMU]] and [[Microsoft Virtual PC]] to name a few.▼
{{Video warning}}
 
▲TheEven though VGA is a complex piece of hardware. Even though it's old, many modern graphics cards are compatible with it, including NVidia and ATI cards. This can make writing a VGA driver rather attractive. The amount of compatibility varies however, so never assume a card is compatible without proper hardware detection.
▲Apart from real machines, several emulators and virtual machines provide VGA emulation: [[Bochs]], [[QEMU]] and [[Microsoft Virtual PC]] to name a few. After 2011 video card manufacturers begun to drop VGA compatibility in favour of [[GOP]] under [[UEFI]] (VirtualBox UEFI and TianoCore both supports that).
 
== Overview ==
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=== What's not covered ===
While this page tries to be a complete overview on what the VGA can do, it does not fully cover the whole set of graphics. After all, a video card only turns bytes in it'sits memory into a signal on the connector on it'sits backside. Determining what bytes to put in memory is only barely touched in the wiki in general -— there are examples of plotting pixels and setting individual characters but your OS will determine what pixels are formed by an image and which characters are part of your title screen. On the remote end, monitors have their own way of dealing with signals. A lot of those settings dictated by monitors are needed by the video card, and each resolution comes with its own set of settings. You can find out your own set of settings by [[Video Signals And Timing|using a set of equations]], but you can skip that step and reuse one of the examples provided at the [[VGA_Hardware#Sample_Register_Settings|example settings]] instead. The [[VGA_Hardware#The_CRT_Controller|CRTC chapter]] explains them in detail.
 
=== Getting started ===
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=== Port 0x3C4, 0x3CE, 0x3D4 ===
These are the most used indexed registers. The index byte is written to the port given, then the data byte can be read/written from port+1. Some programs use a single word16-bit access instead of two byte accesses for writing, which does effectively the same. (take care of byte ordering when doing so)
 
Port 0x3D4 has some extra requirements - it requires bit 0 of the '''Miscellaneous Output Register''' to be set before it responds to this address (if cleared, these ports appears at 0x3B4). Also, registers 0-7 of 0x3D4 are write protected by the protect bit (bit 7 of index 0x11)
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The Plane Write Enable register is used to choose the plane to be written, then the memory can be written by written by accessing the corresponding address in memory.
 
=== Memory Layout in 256-color graphics modes ===
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Although 32 bytes are reserved for each character, only 16, 14, or 8 of them are commonly used, depending on the character height.
 
Planes 0 and 1 are accessible from the host by writing to the video memory range. Plane 0 is accessed on even addresses, plane 1 is accessed on odd addresses, with each consecutive word16-bit value describing the next character. Accessing plane 2 to change fonts requires [[VGA Fonts|changes in addressing logic]].
 
=== Memory Layout in 4-color modes ===
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The read/write logic has several different operation modes. These can be chosen by setting the Graphics Mode register. The VGA has four write modes and 2 read modes, which can be set independently. By default, the VGA operates in read mode 0 and write mode 0 in such a fashion that all written data goes straight to memory, and read data from each plane is ORed together.
 
 
Registers involved:
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* The Bit Mask Register is checked, for each set bit the corresponding bit from the ALU is forwarded. If the bit is clear the bit is taken directly from the Latch.
* The Memory Plane Write Enable field is ANDed with the input from the address logic. For each set bit in the result, the corresponding plane is loaded with the result.
 
 
==== Write mode 3 ====
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* The computed bit mask is checked, for each set bit the corresponding bit from the set/reset logic is forwarded. If the bit is clear the bit is taken directly from the Latch. The result is sent towards memory.
* Finally, The Memory Plane Write Enable field and the input line from the address logic are ANDed together. The bits that remain set are the planes that are actually written.
 
 
''' Todo: more write modes, read modes '''
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==== Timing Model ====
 
The horizontal timing registers are based on a unit called 'character' (As they match one character in text mode). Each character equals 8 ('''9/8 Dot Mode''' is set) or 9 ('''9/8 Dot Mode''' is clear) pixels. Each scanline contains '''Horizontal Total''' + 5 characters, zero based. '''Horizontal Display End''' tells us the last character that is calculated from memory (i.e. the horizontal resolution in characters minus one). '''Horizontal Blanking Start''' and '''Horizontal Retrace Start''' give us the the last character before either period is started. '''Horizontal Blanking End''' and '''Horizontal Retrace End''' need more explanation, as they only contain part of a number. When blanking or horizontal retrace is enabled the significant bits are checked against the character counter, and if these bits match the respective period will be ended. The quick solution is to calculate the appropriate values, compute the last character clock at which each period should be active, then AND it with 0x3F (Blank) or 0x1F (Retrace) to get the register's value. Note that the periods must be between 1 and 63(Blank)/31(Retrace) character clocks. To be safe, there must be at least one character of overscan on each side of the screen to avoid additional artefacts.
 
The vertical timing is similar, apart from the fact that these registers operate on scan lines (pixels) instead of characters. The '''Vertical Retrace End''' and '''Vertical Blank End''' registers work also similar, although they are different sizes. The Retrace End is 4 bits wide (AND with 0xF, period is 1-15 scanlines), The Blank End size is at least 7 bits (some say its 8, some say its 7), so the value is computed by ANDing with 0xFF, with the period ranging from 1-127 scanlines. As with horizontal timing, at least one scan line of overscan must be present to avoid possible artefacts.
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==== Sample timing scheme ====
 
640x480 (16 bitscolours) uses the following sizes:
* Timing: 25MHz dot clock, 8 pixels per character
* Totals: 800 pixels horizontally, (100 characters), 524 scan lines
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! index
! mode 3h (80x25 text mode)
! mode 12h (640x480 planar 16-bit color mode)
! mode 13h (320x200 linear 256-color mode)
! mode X (320x240 planar 256 color mode)
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|}
 
== See Also ==
 
=== External Links ===
 
* http://tinyvga.com/vga-timing — VGA Signal Timing
* http://www.osdever.net/FreeVGA/vga/vga.htm — includes some things not explained here
 
[[Category:VGA]]
[[Category:Video]]
[[Category:Hardware]]
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