TSC: Difference between revisions

The TSC is now used widely for measuring time in modern kernels, like the linux kernel. The APIC timer can be set to the '''TSC-deadline mode''' which uses the processor's internal time-stamp counter to issue an interrupt when the counter exceeds a specific value decided by software. But it is not guaranteed that the APIC timer will use the processor's core crystal frequency (internal clock) or the processor's bus clock. The IA32_TSC_DEADLINE_MSR (model-specific register) is used for setting the deadline value when the interrupt should be issued.