TLB: Difference between revisions
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→Modification of paging structures: AT&T x86 assembly syntax throughout the article (for the sake of consistency) |
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The TLB is not transparently informed of changes made to paging structures. Therefore the TLB has to be flushed upon such a change. On x86 systems, this can be done by writing to the page directory base register (CR3):
<source lang="asm">
</source>
Note: setting the global (G) bit in a page directory/table entry will prevent that entry from being flushed. This is useful for pinning interrupt handlers in place.
An alternate (and better) method is to use the <code>
However, please note that the <code>
<source lang="c">
void vm_page_inval(void *);
</source>
<source lang="asm">
#include <kconfig.h>
.globl vm_page_inval
vm_page_inval:
#if TARGET_MACHINE >= TARGET_MACHINE_I486
movl 4(%esp),%eax
invlpg (%eax)
#else /*
movl %cr3,%eax
movl %eax,%cr3
#endif /*
ret
</source>
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