TLB: Difference between revisions

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general tidy-up, better phrasing, precise terminology
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→‎Modification of paging structures: AT&T x86 assembly syntax throughout the article (for the sake of consistency)
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The TLB is not transparently informed of changes made to paging structures. Therefore the TLB has to be flushed upon such a change. On x86 systems, this can be done by writing to the page directory base register (CR3):
<source lang="asm">
movmovl eax,%cr3,%eax
movmovl cr3,%eax,%cr3
</source>
Note: setting the global (G) bit in a page directory/table entry will prevent that entry from being flushed. This is useful for pinning interrupt handlers in place.
 
An alternate (and better) method is to use the <code>INVLPGinvlpg</code> instruction, which should be used instead of the above method when doing small mapping modifications (creation, removing, changing.) <code>INVLPGinvlpg</code> is mostly used in page unmapping and remapping routines in order to invalidate a previous cached translation. If <code>INVLPGinvlpg</code> or some other TLB flush method had not been used, the mapping would remain cached, causingproducing potentially strange behaviour across theundefined systemconsequences.
 
However, please note that the <code>INVLPGinvlpg</code> instruction was introduced in the i486 ISA and is not part of the i386 ISA, thereby requiring a properly written i386-compatible kernel to use conditional inclusion of relevant code at compilation time depending on the target machine;. anAn example routine followsdeclaration and source code follow:
<source lang="c">
void vm_page_inval(void *);
</source>
<source lang="asm">
#include <kconfig.h>
.globl vm_inval_page
 
vm_inval_page:
.globl vm_page_inval
#ifdef TARGET_ARCH_I486
vm_page_inval:
#if TARGET_MACHINE >= TARGET_MACHINE_I486
movl 4(%esp),%eax
invlpg (%eax)
#else /* TARGET_ARCH_I486TARGET_MACHINE >= TARGET_MACHINE_I486 */
movl %cr3,%eax
movl %eax,%cr3
#endif /* TARGET_ARCH_I486TARGET_MACHINE >= TARGET_MACHINE_I486 */
ret
</source>