CPU Bugs: Difference between revisions
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On AMD CPU, SS selector may become unusable when in-kernel interrupt arrives (sets SS to NULL) and thread is switched and returned to userspace via SYSRET. The numerical SS value is correct however the descriptor cache is wrong. This affects
only the 32-bit compatibility mode usage of SS.
=== PUSH selector ===
On Intel CPUs, when running in 32-bit protected mode, the push will only modify the low 16bit of stack and write there the selector.
The high 16 bits remains unmodified. AMD CPUs do not do this. It may have some security impact, that some of stack is not initialized.
=== Nesting of NMI interrupt ===
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