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Setting Up Paging With PAE: Difference between revisions
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As mentioned above the 'Page-Directory-Pointer-Table' is added, which contains 4 Page-Directory-Entries
<pre>
uint64_t page_dir_ptr_tab[4] __attribute__((aligned(
// ... turning out that you can put more of them into one page, saving memory
</pre>
Now we need our Page-Directory/-Table
<pre>
// 512 entries
uint64_t page_dir[512] __attribute__((aligned(0x1000))); // must be aligned to page boundary
uint64_t page_tab[512] __attribute__((aligned(0x1000)));
</pre>
Line 38 ⟶ 39:
<pre>
asm volatile("movl %cr4, %eax; bts $5, %eax; movl %eax, %cr4"); // set bit5 in CR4 to enable PAE
asm volatile ("movl %%eax, %%cr3" :: "a" (&page_dir_ptr_tab));
</pre>
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</pre>
PAE-Paging should
[[Category:X86 CPU]]
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