Anonymous user
Serial Ports: Difference between revisions
m
Fix mistake in Interrupt State section and flip table for bits 2-1 and 7-6
| [unchecked revision] | [unchecked revision] |
(Added First In / First Out Control Register and Interrupt Identification Register Sections (plus minor consistency edit)) |
m (Fix mistake in Interrupt State section and flip table for bits 2-1 and 7-6) |
||
Line 268:
{| {{wikitable}}
! Bit
! Bit
! Interrupt
! Priority
Line 284:
====FIFO Buffer State====
{| {{wikitable}}
! Bit
! Bit
! State
|-
| |||