RTL8169: Difference between revisions
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ex:
<
char i;
for (i = 0; i < 6; i++)
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mac_address[i] = inportb(ioaddr + i); /*ioaddr is the base address obtainable from the PCI device configuration space.*/
}
</syntaxhighlight>
=== Reset the Chip ===
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ex:
<
outportb(ioaddr + 0x37, 0x10); /*set the Reset bit (0x10) to the Command Register (0x37)*/
while(inportb(ioaddr + 0x37) & 0x10)
;/*setting a timeout could be useful if the card is problematic*/
</syntaxhighlight>
== Setting up the Rx Descriptors ==
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Rx Descriptors are used to tell the NIC where to put packets once received. Because this is an asynchronous operation, we must setup the descriptors before we enable the reception of packets so that the NIC knows where to put things. A major function of descriptors is to tell the NIC which descriptors are owned by the OS (host) and which ones are owned by the NIC. If the descriptor is owned by the NIC, the NIC can then read it and use it for the next packet it receives, if not, it either skips over it or sends a RDU (Rx Descriptor Unavailable) interrupt and halts all further Rx operations. Because there can be multiple descriptors used, there is also a EOR (End of Rx descriptor Ring) bit used when the NIC has reached the end of the descriptors and needs to loop back to the beginning of the descriptors. There is one more big 'gotcha' with all of this, the beginning of the descriptor arrays must be aligned on a 256-byte boundary.
====Descriptor format====
{| {{wikitable}}
<source lang="c">▼
! Offset
! Name
! Description
|-
| dword 0 || Flags || 31 bit=OWN (if set, card own this descriptor) 30 bit=EOR (last descriptor in list)
|-
| dword 1 || VLAN || Unused
|-
| dword 2 || Pointer to buffer low 32 bits ||
|-
| dword 3 || Pointer to buffer high 32 bits ||
|-
|}
====Code example====
struct Descriptor {
uint32_t command; /* command/status uint32_t */
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}
}
</syntaxhighlight>
== Configuring RxConfig and TxConfig ==
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eg:
<
outportl(ioaddr + 0x40, 0x03000700); /* IFG: normal, MXDMA: unlimited */
</syntaxhighlight>
=== RxConfig ===
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eg:
<
outportl(ioaddr + 0x44, 0x0000E70F) /* RXFTH: unlimited, MXDMA: unlimited, AAP: set (promisc. mode set) */
</syntaxhighlight>
== Max Packet Sizes ==
=== Max Transmit Packet Size ===
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eg:
<
outportb(ioaddr + 0xEC, 0x3B); /* Maximum tx packet size */
</syntaxhighlight>
=== Receive Packet Maximum Size ===
The RMS register is located at offset 0xDA and is used for setting the maximum packet size that can be received into the NIC. If set to zero, the NIC will accept no packets (must be set prior to normal operation!). The maximum size that can be set is 0x3FFF (16k - 1), but if a packet larger than 8k is received error bits are set and a lengthier process must be started in order to determine if the packet is actually good or not. I keep this value to 0x1FFF (8k - 1) as it is rare to receive such large packets and it also ensures that error packets are actually error packets and not false positives.
eg:
<
outportw(ioaddr + 0xDA, 0x1FFF); /* Maximum rx packet size */
</syntaxhighlight>
== Full Reset Example ==
This is a barebones example of how to reset the RTL8169 without anything like auto-negotiation (explained later) or (G)MII interactions.
eg:
<
struct Descriptor
{
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outportb(ioaddr + 0x50, 0x00); /* Lock config registers */
}
</syntaxhighlight>
== External Links ==
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