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RTL8139: Difference between revisions
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[[Image:rtl8139.JPG|right|frame|A PCI RTL8139]]
== Programming Guide ==
=== Turning on the RTL8139 ===
Send 0x00 to the CONFIG_1 register (0x52) to set the LWAKE + LWPTN to active high.
this should essentially *power on* the device.
==== Software Reset! ====
Next, we should do a software reset to clear the RX and TX buffers and set everything
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the reset. If the RST bit is high (1), then the reset is still in operation.
==== Init Receive buffer ====
For this part, we will send the chip a memory location to use as its receive buffer start
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outportd(0x30, (unsigned long)rx_buffer); // send dword memory location to RBSTART (0x30)
=== Set IMR + ISR ===
The Interrupt Mask Register (IMR) and Interrupt Service Register (ISR) are responsible
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01000101: Confirmed. In fact, the only way to clear an interrupt is by writing to it. The datasheet says that reading is what you must do, but it is completely wrong.
=== Configuring receive buffer (RCR) ===
Before hoping to see a packet coming to you, you should tell the RTL8139 to '''accept''' packets based on various rules. The configuration register is RCR.
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outportl(0x44, 0xf | (1 << 7)); // (1 << 7) is the WRAP bit, 0xf is AB+AM+APM+AAP
=== Enable Receive and Transmitter ===
Now is the time to start up the RX and TX functions.
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