RTL8139: Difference between revisions

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m 8k is 8192 bytes, not 8139.. correct?
m Minor spelling fixes..
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the reset. If the RST bit is high (1), then the reset is still in operation.
 
==Init RecieveReceive buffer==
 
For this part, we will send the chip a memory location to use as its recievereceive buffer start
location. One way to do it, would be to define a buffer variable and send
that variables memory location to the RBSTART register (0x30).
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The Interrupt Mask Register (IMR) and Interrupt Service Register (ISR) are responsible
for firing up different IRQs. The IMR bits line up with the ISR bits to work in sync.
If an IMR bit is low, then the corrospondingcorresponding ISR bit with never fire an IRQ when the
time comes for it to happen. The IMR is located at 0x3C and the ISR is located at 0x3E.
 
To set the RTL8139 to accept only the Transmit OK (TOK) and RecieveReceive OK (ROK) interrupts,
we would have the TOK and ROK bits of the IMR high and leave the rest low. That way when
a TOK or ROK IRQ happens, it actually will go through and fire up an IRQ.
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outportw(0x3C, 0x0005); // Sets the TOK and ROK bits high
 
==Enable RecieveReceive and Transmitter==
 
Now is the time to start up the RX and TX functions.
This is quite an easy peicepiece, and should (in my opinion) only be done after all of the
configurations to the RTL8139's registers have been set to what is desired. The
RE (RecieverReceiver Enabled) and the TE (Transmitter Enabled) bits are located in the Command
Register (0x37). Starting up the RE and TE is pretty straight-forward, but lets go
through it anyways.