RISC-V Meaty Skeleton with QEMU virt board: Difference between revisions
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Operating systems development is about being an expert. Take the time to read the code carefully through and understand it. Please seek further information and help if you don't understand aspects of it. This code is minimal and almost everything is done deliberately, often to pre-emptively solve future problems.
===Project Structure===
* <code>Makefile</code>: used for building the project with <code>make</code> build system
* <code>misc/riscv64-virt.dts</code>: device tree of QEMU RISC-V <code>virt</code> board. See [https://twilco.github.io/riscv-from-scratch/2019/04/27/riscv-from-scratch-2.html#finding-our-stack Finding our stack] for details
* <code>src/</code>: source tree containing files used to build the project
** <code>src/asm/crt0.s</code>: minimal C runtime; see [https://twilco.github.io/riscv-from-scratch/2019/04/27/riscv-from-scratch-2.html#stop--hammertime-runtime Stop! Runtime!] for details
** <code>src/lds/riscv64-virt.ld</code>: custom linker script adapted from the output of <code>riscv64-unknown-elf-ld --verbose</code>; see [https://twilco.github.io/riscv-from-scratch/2019/04/27/riscv-from-scratch-2.html#link-it-up Link it up] for details
** <code>src/common/</code>: common utilities and library functions for use across our project
** <code>src/syscon/</code>: [https://elixir.bootlin.com/linux/v4.0/source/Documentation/devicetree/bindings/mfd/syscon.txt syscon] drivers for poweroff and reboot
** <code>src/uart/</code>: UART drivers and I/O-related code
** <code>src/kmain.c</code>: Entry point for our kernel
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