RISC-V Bare Bones: Difference between revisions
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m Low level detailed explanation: NuttX RTOS on Star64 Soc |
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The thing we will make here is a simple serial port output/reader.
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#include <stdint.h>
#include <stddef.h>
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return;
}
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This will print a simple "Hello world!" and a newline following, after that it will echo any input given to the serial port.
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Be wary we are just setting up stack and jumping into kernel. It's the kernel's job to set up IRQs and other system stuff
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.section .init
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.end
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Take in account that you need to implement a type of locking if you want to support SMP, and implement a trampoline or a jail for the CPUs. Be wary that we haven't enabled interrupts just yet and any return from kmain will result in invalid opcodes being executed.
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We need to specify where our kernel will be loaded at. For this example we will use the start of the RAM as our load address.
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ENTRY(start);
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}
}
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== Final ==
The process is pretty straightforward:
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riscv64-elf-gcc -Wall -Wextra -c -mcmodel=medany kernel.c -o kernel.o -ffreestanding
riscv64-elf-as -c entry.S -o entry.o
riscv64-elf-ld -T linker.ld -lgcc -nostdlib kernel.o entry.o -o kernel.elf
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Once this is done, the kernel can be run with the following:
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qemu-system-riscv64 -machine virt -bios none -kernel kernel.elf -serial mon:stdio
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You will promptly see a terminal with the "Hello world!" and you can "write stuff" to it. A serial terminal is very "boring", but you still have a lot at your disposal, you have a PLIC, a CLIC and a bunch of opportunities to learn PCI internals.
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