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'''Protected mode''' is the 'native'main operating mode of modern Intel processors (and clones) since the 80286 (16 bit). On 80386s and later, itthe allows32 thebit developerProtected toMode allows workworking with several virtual address spaces, each of which has a maximum of 4GB of addressable memory; and allowsenables the system to enforce strict memory and hardware I/O protection as well as restricting the available instruction set (sovia that your application cannot control the hard disk directly while the kernel can)[[Security#Rings|Rings]].
 
ProtectedA modeCPU unleashesthat theis realinitialized powerby ofthe your[[BIOS]] CPU,starts soin you[[Real betterMode]]. getEnabling informedProtected aboutMode itunleashes ifthe youreal arepower consideringof writingyour an OSCPU. However, it will prevent you from using virtually anymost of the BIOS interrupts, since these work in Real Mode (unless you have also written a [[Virtual 8086 Mode|V86]] monitor).
 
==Entering Protected Mode==
Before switch to Protected Mode, you have to disable interrupts and [[Non Maskable Interrupt|NMI]] (as suggested by Intel Developers Manual), optionally enable [[A20 Line]], and load the [[Global Descriptor Table]]
 
ThisBefore takes youswitching to protected mode..., you must:▼
Whether the CPU is in [[Real Mode]] or in protected mode is defined by the lowest bit of the CR0 or MSW register. Example:▼
*Disable interrupts, including [[Non Maskable Interrupt|NMI]] (as suggested by Intel Developers Manual).
*Enable the [[A20 Line]].
*Load the [[Global Descriptor Table]] with segment descriptors suitable for code, data, and stack.
 
▲Whether the CPU is in [[Real Mode]] or in protectedProtected modeMode is defined by the lowest bit of the CR0 or MSW register. Example:
CLI
LGDT [GDTR]
MOV EAX, CR0
OR AL, 1
MOV CR0, EAX
 
This example loads a descriptor table into the processor's GDTR register, and then sets the lowest bit of CR0:
Immediately after that you have to jump to the code segment in the GDT:
<syntaxhighlight lang="asm">
cli ; disable interrupts
lgdt [gdtr] ; load GDT register with start address of Global Descriptor Table
mov eax, cr0
or al, 1 ; set PE (Protection Enable) bit in CR0 (Control Register 0)
mov cr0, eax
 
; Perform far jump to selector 08h (offset into GDT, pointing at a 32bit PM code segment descriptor)
JMP 08h:PModeMain▼
; to load CS with proper PM32 descriptor)
▲ JMPjmp 08h:PModeMain
 
PModeMain:
▲This takes you to protected mode...
; load DS, ES, FS, GS, SS, ESP
 
</syntaxhighlight>
Good Luck
 
==See Also==
===Articles===
*[[Real Mode]]
*[[Virtual 8086 Mode]]
*[[Journey To The Protected Land]]
 
===External Links===
*http://www.osdever.net/tutorials/view/the-world-of-protected-mode - very good tutorial on how to enter protected mode
*[http://www.nondot.org/sabre/os/articles/ProtectedMode/ OSRC: protected mode]
*http://home.swipnet.se/smaffy/asm/info/embedded_pmode.pdf - pragmatic tutorial on pmodeprotected mode ([http://web.archive.org/web/20030604185154/http://home.swipnet.se/smaffy/asm/info/embedded_pmode.pdf Cached copy])
*http://www.osdeverbrokenthorn.netcom/tutorialsResources/OSDev8.php?cat=4&sort=1html
*[[Wikipedia:Protected_mode|Protected mode Wikipedia page]]
*http://members.tripod.com/protected_mode/alexfru/pmtuts.html - PMode tutorials in C & Asm
 
[[Category:X86 CPU]]
[[Category:Operating Modes]]
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