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'''Protected mode''' is the 32 bit 'native'main operating mode of modern Intel processors (and clones) since the 8038680286 (16 bit). ItOn allows80386s and later, the developer32 tobit Protected Mode allows workworking with several virtual address spaces, each of which has a maximum of 4GB of addressable memory; and allowsenables the system to enforce strict memory and hardware I/O protection as well as restricting the available instruction set (so thatvia your application cannot control the hard disk directly while the kernel can)[[Security#Rings|Rings]].
 
ProtectedA modeCPU unleashesthat theis realinitialized powerby ofthe your[[BIOS]] CPU,starts soin you[[Real betterMode]]. getEnabling informedProtected aboutMode itunleashes ifthe youreal arepower consideringof writingyour an OSCPU. However, it will prevent you from using virtually anymost of the BIOS interrupts, since these work in Real Mode (unless you have also written a [[Virtual 8086 Mode|V86]] monitor).
 
==Entering Protected Mode==
Whether the CPU is in [[Real Mode]] or in protected mode is defined by the lowest bit of the CR0 register, so basically▼
 
Before switching to protected mode, you must:
;; make sure interrupts are disabled, etc.
*Disable interrupts, including [[Non Maskable Interrupt|NMI]] (as suggested by Intel Developers Manual).
mov eax, cr0▼
*Enable the [[A20 Line]].
or al,1
*Load the [[Global Descriptor Table]] with segment descriptors suitable for code, data, and stack.
mov cr0,eax▼
 
▲Whether the CPU is in [[Real Mode]] or in protectedProtected modeMode is defined by the lowest bit of the CR0 register,or soMSW register. basically
takes you to protected mode ... however you'll discover that there are many other things to be done before and after that operation to switch gracefully to pmode rather than resetting the CPU...
 
This example loads a descriptor table into the processor's GDTR register, and then sets the lowest bit of CR0:
<syntaxhighlight lang="asm">
cli ; disable interrupts
lgdt [gdtr] ; load GDT register with start address of Global Descriptor Table
▲ mov eax, cr0
or al, 1 ; set PE (Protection Enable) bit in CR0 (Control Register 0)
▲ mov cr0, eax
 
; Perform far jump to selector 08h (offset into GDT, pointing at a 32bit PM code segment descriptor)
; to load CS with proper PM32 descriptor)
jmp 08h:PModeMain
 
PModeMain:
; load DS, ES, FS, GS, SS, ESP
</syntaxhighlight>
 
==See Also==
===Articles===
*[[Real Mode]]
*[[Virtual 8086 Mode]]
 
===External Links===
*http://www.osdever.net/tutorials/view/the-world-of-protected-mode - very good tutorial on how to enter protected mode
*[http://www.nondot.org/sabre/os/articles/ProtectedMode/ OSRC: protected mode]
*http://home.swipnet.se/smaffy/asm/info/embedded_pmode.pdf - pragmatic tutorial on pmodeprotected mode ([http://web.archive.org/web/20030604185154/http://home.swipnet.se/smaffy/asm/info/embedded_pmode.pdf Cached copy])
*http://www.osdeverbrokenthorn.netcom/tutorialsResources/OSDev8.php?cat=4&sort=1html
*[[Wikipedia:Protected_mode|Protected mode Wikipedia page]]
*http://members.tripod.com/protected_mode/alexfru/pmtuts.html - PMode tutorials in C & Asm
 
[[Category:X86 CPU]]
[[Category:Operating Modes]]
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