Paging: Difference between revisions

Paging is achieved through the use of the [[Memory Management Unit]] (MMU). On the x86, the MMU maps memory through a series of [[Page Tables|tables]], two to be exact. They are the paging directory (PD), and the paging table (PT).

Both [[Page Tables| tables]] contain 1024 4-byte entries, making them 4 KiB each. In the page directory, each entry points to a page table. In the page table, each entry points to a physical address that is then mapped to the virtual address found by calculating the offset within the directory and the offset within the table. This can be done as the entire table system represents a linear 4-GiB virtual memory map.