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The 'C' bit is 'D' bit above.
====INVLPG====
INVLPG is an instruction available since the 486 that invalidates a single page table entry in the TLB. Intel warns that this instruction may be implemented differently on future processors. INVLPG modifies no flags.
NASM example:
invlpg [0]
Inline asm in C:
__asm__ volatile("invlpg %0"::"m" (*(char *)addr));
===Example===
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