PCI IDE Controller: Difference between revisions

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Large cleanup, needs grammar and technical checks. Part one
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m (Large cleanup, needs grammar and technical checks. Part one)
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IDE is a keyword pointswhich refers to the semi-conductorselectrical onspecification of the mother-boardcables thatwhich controlsconnect ATA Drivesdrives (like ATAhard Hard-Disksdrives) to another device. ATAThe (AT-Attachment)drives isuse the interfaceATA of(Advanced thisTechnology drivesAttachment) interface. An IDE cable also can beterminate at an IDE card connected to PCI.
 
[[ATAPI]] is an extension to ATA. ATAPI (ATArecently Packetrenamed Interfaceto PATA) which adds the support offor Drives wich usesthe SCSI Command-Setcommand (like ODDs (Optical Disk Drives .e.g CD-ROMs, DVD-ROMs), Tape Drives, and ZIP Drives).set
 
===Parallel/Serial ATA/ATAPI===
IDE can allowconnect evenup to 4 drives to be connected to. Each drive may be:
 
* 1. Parallel AT-Attachment [PATA]ATA: LikeCommonly used in PATAhard HDDsdrives.
* 2. Parallel AT-AttachmentATAPI: Packet-InterfaceCommonly [PATAPI]:used Likein PATAPIoptical ODDsdrives.
* 3. Serial ATA [SATA]: LikeUsed in most modern SATAhard HDDsdrives.
* 4. Serial ATAPI [SATAPI]: LikeUsed in most modern SATAPIoptical ODDsdrives.
 
We can ignore Tape Drives and ZIP Drives as they are obsolete.
The Way of accessing ATA Drives is one, means that the way of accessing PATA HDDs is the same of SATA HDDs. also the way of accessing PATAPI ODDs is the same of SATAPI ODDs.
For that, forThe IDE Devicedevice Driver,driver itdoesn't is not requiredneed to know if a drive is Parallel or Serial, but it is important to knowonly if it is ATA or ATAPI.
 
===IDE Interface===
[[Image:Ide-motherboard-connectors.jpg|thumb|IDE on motherboard|256px|The white and green ports are the Parallel IDE ports on the motherboard.]]
[[Image:PATA-Cable.jpg|thumb|PATA Cable|256px|PATA Cablecable which isconnects connectedto to a Parallel IDE Ports on motherboardport.]]
[[Image:SATA-motherboard.jpg|thumb|SATA Ports|256px|4 Serial IDE Portsports on the motherboard.]]
[[Image:SATA-Cable.gif|thumb|SATA Cable|256px|SATA Cablecable connectedwhich connects to SATA Ports on the motherboard, or on a Serial IDE Card Connected toSATA PCIport.]]
 
If you open your case and look at the mother board, weyou will see a port or two like these in the picture to the right.
 
The white and green ports are IDE Portsports, eachalso portknown ofas themchannels. isIn calledthis channel. soexample there is:are both primary and secondary IDE channels which only PATA can be connected to; this means that it only supports PATA/PATAPI drives.
* Primary IDE Channel.
* Secondary IDE Channel.
These Ports allows only Parallel Drives to be connected to, means that it supports only PATA/PATAPI Drives.
 
Each Portport can hashave a PATA cable connected to, it is like this in the(see photo to theon right). One master drive, or two drives [Master(master and Slave]slave) can be connected to one PATA Cablecable.
 
 
 
Each Port can has a PATA cable connected to, it is like this in the photo to the right. One master drive, or two drives [Master and Slave] can be connected to one PATA Cable.
So we can have:
* Primary Master Drive.
Line 37 ⟶ 30:
* Secondary Master Drive.
* Secondary Slave Drive.
Each Drivedrive Maymay be: PATA or PATAPI.
 
===Detecting anSerial IDE===
 
Almost many ofevery modern motherboardsmotherboard havehas a Serial IDE channel which allows [[SATA]] and SATAPI Drives to be connected to it.
 
There are four Serial IDE Ports are 4, like; these appear in the photo to the right,. Each Portport is conductedconnected to a drive with a Serial ATA (SATA) Cable.
 
 
 
But What about Serial IDE?
Almost many of modern motherboards have a Serial IDE which allows SATA and SATAPI Drives to be connected to.
Serial IDE Ports are 4, like these appear in the photo to the right, Each Port is conducted with a Serial ATA (SATA) Cable.
So from the pictures we can understand that only one drive can be connected to Serial IDE Port, each two ports make a channel, and also Serial IDE has:
 
* Primary Master Drive [Port1, or Port 2], also called [SATA1] in BIOS Setup Utility.
* Primary Slave Drive [Port 1 or Port 2], also called [SATA2] in BIOS Setup Utility.
* Secondary Master Drive [Port 3 or Port 4], also called [SATA3] in BIOS Setup Utility.
* Secondary Slave Drive [Port 3 or Port 4], also called [SATA4] in BIOS Setup Utility.
 
===Detecting an IDE===
Please if you wanna support only the Parallel IDE, skip the part of [Detecting an IDE].
Each IDE appears as a device [in PCI World, it is called a function] on PCI Bus. If you don't know about PCI, please refer to [http://wiki.osdev.org/PCI PCI].
When you find a device on PCI, you should determine whether it is an IDE Device or not, this is determined according to Class Code and Subclass code.
If Class code is: 0x01 [Mass Storage Controller] and Subclass Code is: 0x01 [IDE], so this device is an IDE Device.
We know all that each PCI Device has 6 BARs, ok, only 5 BARs are used by IDE Device:
* BAR0: Base Address of Primary Channel I/O Ports, if it is 0x0 or 0x1, this means [0x1F0].
* BAR1: Base Address of Priamry Channel Control Ports, if it is 0x0 or 0x1, this means [0x3F4].
* BAR2: Base Address of Secondary Channel I/O Ports, if it is 0x0 or 0x1, this means [0x170].
* BAR3: Base Address of Secondary Channel Control Ports, if it is 0x0 or 0x1, this means [0x374].
* BAR4: Bus Master IDE, this I/O Address refers to the base of I/O range consists of 16 ports, each 8 ports controls DMA on a channel.
 
===Detecting an IDE drive===
IRQs are really a problem for IDEs, because the IDE uses IRQs 14 and 15, if it is a Parallel IDE.
Each IDE drive appears as a device on the [[PCI]] bus. If Classthe class code is: 0x01 [(Mass Storage Controller]) and Subclassthe Codesubclass code is: 0x01 [IDE]0x1, so(IDE) this device is an IDE Device.
If it is a Serial IDE, it uses another IRQ and only one IRQ, but how does we know the IRQs used by IDE? In Quafios it is quite easy:
The IDE device only uses five BARs out of the six
* BAR0: Base Addressaddress of Primaryprimary channel Channel (I/O Portsspace), if it is 0x0 or 0x1, thisthe meansport is [0x1F0].
* BAR1: Base Addressaddress of Priamryprimary channel control Channelport Control(I/O Portsspace), if it is 0x0 or 0x1, thisthe meansport is [0x3F4].
* BAR2: Base Addressaddress of Secondarysecondary Channelchannel (I/O Portsspace), if it is 0x0 or 0x1, thisthe meansport is [0x170].
* BAR3: Base Addressaddress of Secondarysecondary Channelchannel Controlcontrol Portsport, if it is 0x0 or 0x1, thisthe meansport is [0x374].
* BAR4: Bus Master IDE, this I/O Address; refers to the base of I/O range consistsconsisting of 16 ports,. eachEach 8 ports controls DMA on athe primary and secondary channel respectively.
 
A parallel IDE drive will use IRQs 14 and 15; a serial IDE uses only one IRQ. To read this IRQ, we look through the device's PCI configuration space:
<source lang="c">
outl((1 << 31) | (bus << 16) | (device << 11) | (func << 8) | 8, 0xCF8); // Send the parameters.
if ((class = inl(0xCFC) >> 16) != 0xFFFF) { // If theredevice isexists exactly(class aisn't device0xFFFF)
// Check if this device needneeds an IRQ assignment:
outl((1 << 31) | (bus << 16) | (device << 11) | (func << 8) | 0x3C, 0xCF8); // Read the interrupt line field
outb(0xFE, 0xCFC); // Change the IRQ field to 0xFE
outl((1 << 31) | (bus << 16) | (device << 11) | (func << 8) | 0x3C, 0xCF8); // Read the IRQinterrupt Fieldline Again.field
if ((inl(0xCFC) & 0xFF) == 0xFE) {
// This Devicedevice needs an IRQ assignment.
} else {
// The Devicedevice doesn't use IRQs, check if this is an Parallel IDE:
if (class == 0x01 && subclass == 0x01 && (ProgIF == 0x8A || ProgIF == 0x80)) {
// This is a Parallel IDE Controller which useused IRQIRQs 14 and IRQ 15.
}
}
}
</source>
 
By this way, you can make a structure with PCI Devices, each device has IRQ0 and IRQ1, the both should have an initial value of 0xFF [No IRQ]. if we detect a PCI Device, if the Device needs an IRQ, we can change IRQ0. if the device on PCI doesn't need, but it is a Parallel IDE, we can edit IRQ0 to 14 and IRQ1 to 15.
 
When an IRQ is invoked, ISR should read the IRQ number from PIC, then it searches for the device which has this IRQ [in IRQ0 or IRQ1], and if the device is found, call the device driver to inform it that an IRQ is invoked.
 
===Detecting IDE Drives===
 
To initialise the IDE driver, we call ide_initialise:
In Quafios, when an IDE Device is found, Quafios reserves a space in memory and copies Generic IDE Device Driver to this space, And then calls the device driver with a function number of 1. function number 1 is initialization, which is:
 
<source lang="c">
void ide_initialize(unsigned int BAR0, unsigned int BAR1, unsigned int BAR2, unsigned int BAR3,
Line 100 ⟶ 78:
</source>
 
If you wannaonly want to support only the parallel IDE, you can put this commanduse inthese kernelparameters:
 
<source lang="c">
ide_initialize(0x1F0, 0x3F4, 0x170, 0x374, 0x000);
Line 107 ⟶ 84:
 
We can assume that BAR4 is 0x0 because we are not going to use it yet.
We will return to ide_initialize function which searches for drives connected to the IDE, but before we are going into this function, we should write some support functions which will help us a lot. But before that, we should write some definitions:
First We should write some Definitions:
 
<source lang="c">
Line 120 ⟶ 96:
#define ATA_SR_ERR 0x01
</source>
There is a port is called the Command/Status Port, when it is read, you read the status of channel, is returned; the above bit masksmask expressexpresses these states.
 
There is a port is called Command/Status Port, when it is read, you read the status of channel, the above bit masks express these states.
 
<source lang="c">
Line 133 ⟶ 108:
#define ATA_ER_AMNF 0x01
</source>
There is also port called the Features/Error Port, which returns the most recent error upon read; the above definitions express the possible bit masks
 
There is a port is called Features/Error Port, if it is read, you are reading the errors of the last operation, the bit masks above express these errors.
 
<source lang="c">
// ATA-Commands:
#define ATA_CMD_READ_PIO 0x20
#define ATA_CMD_READ_PIO_EXT 0x24
Line 152 ⟶ 125:
#define ATA_CMD_IDENTIFY 0xEC
</source>
When you write to the Command/Status Portport, Youyou are executing a command, which can be one of the commands above.
 
When you write to Command/Status Port, You are executing a command, which can be one of the commands above.
 
<source lang="c">
Line 160 ⟶ 132:
</source>
 
The Commandcommands above are for ATAPI Devices which will be understood soon.
 
The Commands ATA_CMD_IDENTIFY_PACKET, and ATA_CMD_IDENTIFY, returns a buffer of 512 byte, the buffer is called Identification space, the following definitions are used to read information from the identification space.
 
The Commands ATA_CMD_IDENTIFY_PACKET, and ATA_CMD_IDENTIFY, returnsreturn a buffer of 512 byte, the buffer isbytes called Identification space,; the following definitions are used to read information from the identification space.
<source lang="c">
#define ATA_IDENT_DEVICETYPE 0
Line 179 ⟶ 150:
 
When you select a drive, you should specify if it is the master drive or the slave one:
 
<source lang="c">
#define ATA_MASTER 0x00
Line 191 ⟶ 161:
 
<source lang="c">
// ATA-ATAPI Task-File:
#define ATA_REG_DATA 0x00
#define ATA_REG_ERROR 0x01
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