Revision as of 16:30, 10 November 2009 view source osdev>Brynet-inc m →‎Detecting IDE Drives ← Older edit		Revision as of 16:31, 10 November 2009 view source osdev>Brynet-inc m →‎Read/Write From ATA Drive Newer edit →
Line 555: DMA: After sending the command, you should wait for an IRQ, while you are waiting, Buffer is written directly to memory automatically. We are going to use PIO as it isn't going to be ~~complix~~complex, and i want to be far from IRQs as they are very slower than Polling after PIO. We can conclude also this table: Line 635: unsigned int slavebit = ide_devices[drive].drive; // Read the Drive [Master/Slave] unsigned int bus = channels[channel].base; // Bus Base, like 0x1F0 which is also data port. unsigned int words = 256; // ~~Approximatly~~Approximately all ATA-Drives has sector-size of 512-byte. unsigned short cyl, i; unsigned char head, sect, err; </source> Line 703: * Bits 0-3: Head Number for CHS. * Bit 4: Slave Bit. (0: Selecting Master Drive, 1: Selecting Slave Drive). * Bit 5: ~~Obselete~~Obsolete and isn't used, but should be set. * Bit 6: LBA (0: CHS, 1: LBA). * Bit 7: ~~Obselete~~Obsolete and isn't used, but should be set. Lets write all these information to the register, while the ~~obselete~~obsolete bits are set (0xA0): <source lang="c"> Line 764: </source> This Command "ATA_CMD_READ_PIO" is right for ~~rading~~reading in LBA28 or CHS, and controller refers to bit 6 of HDDEVSEL Register to know the mode of reading (LBA or CHS). After sending the command, we should poll, then we read/write a sector then we should poll, then we read/write a sector, until we read/write all sectors needed, if an error is happened, we the function will return a specific error code.

PCI IDE Controller: Difference between revisions