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PCI IDE Controller: Difference between revisions
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Large cleanup, needs grammar and technical checks. Part one
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IDE is a keyword
[[ATAPI]] is an extension to ATA
===Parallel/Serial ATA/ATAPI===
IDE can
*
*
*
*
The Way of accessing ATA Drives is one, means that the way of accessing PATA HDDs is the same of SATA HDDs. also the way of accessing PATAPI ODDs is the same of SATAPI ODDs.
===IDE Interface===
[[Image:Ide-motherboard-connectors.jpg|thumb|IDE on motherboard|256px|The white and green ports are the Parallel IDE ports on the motherboard.]]
[[Image:PATA-Cable.jpg|thumb|PATA Cable|256px|PATA
[[Image:SATA-motherboard.jpg|thumb|SATA Ports|256px|4 Serial IDE
[[Image:SATA-Cable.gif|thumb|SATA Cable|256px|SATA
If you open your case and look at the mother board,
The white and green ports are IDE
Each
▲Each Port can has a PATA cable connected to, it is like this in the photo to the right. One master drive, or two drives [Master and Slave] can be connected to one PATA Cable.
So we can have:
* Primary Master Drive.
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* Secondary Master Drive.
* Secondary Slave Drive.
Each
Almost
There are four Serial IDE Ports
▲Almost many of modern motherboards have a Serial IDE which allows SATA and SATAPI Drives to be connected to.
▲Serial IDE Ports are 4, like these appear in the photo to the right, Each Port is conducted with a Serial ATA (SATA) Cable.
So from the pictures we can understand that only one drive can be connected to Serial IDE Port, each two ports make a channel, and also Serial IDE has:
* Primary Master
* Primary Slave
* Secondary Master
* Secondary Slave
▲===Detecting an IDE===
If Class code is: 0x01 [Mass Storage Controller] and Subclass Code is: 0x01 [IDE], so this device is an IDE Device.▼
* BAR0: Base Address of Primary Channel I/O Ports, if it is 0x0 or 0x1, this means [0x1F0].▼
* BAR1: Base Address of Priamry Channel Control Ports, if it is 0x0 or 0x1, this means [0x3F4].▼
* BAR2: Base Address of Secondary Channel I/O Ports, if it is 0x0 or 0x1, this means [0x170].▼
* BAR3: Base Address of Secondary Channel Control Ports, if it is 0x0 or 0x1, this means [0x374].▼
* BAR4: Bus Master IDE, this I/O Address refers to the base of I/O range consists of 16 ports, each 8 ports controls DMA on a channel.▼
===Detecting an IDE drive===
▲Each IDE drive appears as a device on the [[PCI]] bus. If
The IDE device only uses five BARs out of the six
▲* BAR0: Base
▲* BAR1: Base
▲* BAR2: Base
▲* BAR3: Base
▲* BAR4: Bus Master IDE
A parallel IDE drive will use IRQs 14 and 15; a serial IDE uses only one IRQ. To read this IRQ, we look through the device's PCI configuration space:
<source lang="c">
outl((1 << 31) | (bus << 16) | (device << 11) | (func << 8) | 8, 0xCF8); // Send the parameters.
if ((
// Check if this device
outl((1 << 31) | (bus << 16) | (device << 11) | (func << 8) | 0x3C, 0xCF8); // Read the interrupt line field
outb(0xFE, 0xCFC); // Change the IRQ field to 0xFE
outl((1 << 31) | (bus << 16) | (device << 11) | (func << 8) | 0x3C, 0xCF8); // Read the
if ((inl(0xCFC) & 0xFF) == 0xFE) {
// This
} else {
// The
if (class == 0x01 && subclass == 0x01 && (ProgIF == 0x8A || ProgIF == 0x80)) {
// This is a Parallel IDE Controller which
}
}
}
</source>
===Detecting IDE Drives===
To initialise the IDE driver, we call ide_initialise:
<source lang="c">
void ide_initialize(unsigned int BAR0, unsigned int BAR1, unsigned int BAR2, unsigned int BAR3,
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</source>
If you
<source lang="c">
ide_initialize(0x1F0, 0x3F4, 0x170, 0x374, 0x000);
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We can assume that BAR4 is 0x0 because we are not going to use it yet.
We will return to ide_initialize function which searches for drives connected to the IDE, but before we are going into this function, we should write some support functions which will help us a lot. But before that, we should write some definitions:
<source lang="c">
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#define ATA_SR_ERR 0x01
</source>
There is a port
▲There is a port is called Command/Status Port, when it is read, you read the status of channel, the above bit masks express these states.
<source lang="c">
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#define ATA_ER_AMNF 0x01
</source>
There is also port called the Features/Error Port, which returns the most recent error upon read; the above definitions express the possible bit masks
<source lang="c">
#define ATA_CMD_READ_PIO 0x20
#define ATA_CMD_READ_PIO_EXT 0x24
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#define ATA_CMD_IDENTIFY 0xEC
</source>
When you write to the Command/Status
▲When you write to Command/Status Port, You are executing a command, which can be one of the commands above.
<source lang="c">
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</source>
The
The Commands ATA_CMD_IDENTIFY_PACKET, and ATA_CMD_IDENTIFY, returns a buffer of 512 byte, the buffer is called Identification space, the following definitions are used to read information from the identification space.▼
▲
<source lang="c">
#define ATA_IDENT_DEVICETYPE 0
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When you select a drive, you should specify if it is the master drive or the slave one:
<source lang="c">
#define ATA_MASTER 0x00
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<source lang="c">
#define ATA_REG_DATA 0x00
#define ATA_REG_ERROR 0x01
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