PCI IDE Controller: Difference between revisions

IDE is a keyword which refers to the electrical specification of the cables which connect ATA drives (like hard drives) to another device. The drives use the ATA (Advanced Technology Attachment) interface. An IDE cable also can terminate at an IDE card connected to PCI.

 

 

 

* Primary Master Drive.

* Primary Slave Drive.

* Secondary Master Drive.

* Secondary Slave Drive.

 

* Primary Master, also called SATA1.

* Primary Slave, also called SATA2.

* Secondary Master, also called SATA3.

* Secondary Slave, also called SATA4.

 

To initialise the IDE driver, we call ide_initialise:

void ide_initialize(unsigned int BAR0, unsigned int BAR1, unsigned int BAR2, unsigned int BAR3,

unsigned int BAR4) {

If you only want to support the parallel IDE, you can use these parameters:

We can assume that BAR4 is 0x0 because we are not going to use it yet.

#define ATAPI_CMD_READ 0xA8

#define ATAPI_CMD_EJECT 0x1B

 

* BAR0 + 0 is first port.

* BAR0 + 1 is second port.

// Channels:

#define ATA_PRIMARY 0x00

#define ATA_SECONDARY 0x01

 

// Directions:

#define ATA_READ 0x00

#define ATA_WRITE 0x01

So we can make this global structure:

unsigned short base; // I/O Base.

unsigned short ctrl; // Control Base

unsigned char nIEN; // nIEN (No Interrupt);

} channels[2];

unsigned char ide_buf[2048] = {0};

unsigned static char atapi_packet[12] = {0xA8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};

We said the the IDE can contain up to 4 drives:

struct ide_device {

} ide_devices[4];

When we read a register in a channel, like STATUS Register, it is easy to execute:

ide_read(channel, ATA_REG_STATUS);

 

unsigned char ide_read(unsigned char channel, unsigned char reg) {

unsigned char result;

return result;

}

void ide_write(unsigned char channel, unsigned char reg, unsigned char data) {

}

void ide_read_buffer(unsigned char channel, unsigned char reg, unsigned int buffer,

unsigned int quads) {

asm("pushw %es; movw %ds, %ax; movw %ax, %es");

asm("popw %es;");

}

 

unsigned char ide_polling(unsigned char channel, unsigned int advanced_check) {

 

// (I) Delay 400 nanosecond for BSY to be set:

// -------------------------------------------------

 

// (II) Wait for BSY to be cleared:

// -------------------------------------------------

 

if (advanced_check) {

unsigned char state = ide_read(channel, ATA_REG_STATUS); // Read Status Register.

 

// (III) Check For Errors:

// -------------------------------------------------

 

// (IV) Check If Device fault:

// -------------------------------------------------

 

// (V) Check DRQ:

// -------------------------------------------------

// BSY = 0; DF = 0; ERR = 0 so we should check for DRQ now.

 

}

 

}

unsigned char ide_print_error(unsigned int drive, unsigned char err) {

 

if (err == 1) {printk("- Device Fault\n "); err = 19;}

else if (err == 2) {

else if (err == 4) {printk("- Write Protected\n "); err = 8;}

printk("- [%s %s] %s\n",

ide_devices[drive].model);

 

return err;

}

void ide_initialize(unsigned int BAR0, unsigned int BAR1, unsigned int BAR2, unsigned int BAR3,

unsigned int BAR4) {

 

// 1- Detect I/O Ports which interface IDE Controller:

// 2- Disable IRQs:

ide_write(ATA_PRIMARY , ATA_REG_CONTROL, 2);

ide_write(ATA_SECONDARY, ATA_REG_CONTROL, 2);

 

// 3- Detect ATA-ATAPI Devices:

for (i = 0; i < 2; i++)

 

unsigned char err = 0, type = IDE_ATA, status;

 

// (I) Select Drive:

sleep(1); // Wait 1ms for drive select to work.

 

 

// (III) Polling:

 

while(1) {

status = ide_read(i, ATA_REG_STATUS);

if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRQ)) break; // Everything is right.

}

// (IV) Probe for ATAPI Devices:

 

 

 

ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY_PACKET);

 

// (VI) Read Device Parameters:

 

// (VII) Get Size:

// Device uses 48-Bit Addressing:

// Device uses CHS or 28-bit Addressing:

 

// (VIII) String indicates model of device (like Western Digital HDD and SONY DVD-RW...):

 

count++;

// 4- Print Summary:

for (i = 0; i < 4; i++)

printk(" Found %s Drive %dGB - %s\n",

}

}

There is 3 ways of addressing a sector:

else

Reading the buffer may be done by polling or DMA.

DMA: After sending the command, you should wait for an IRQ, while you are waiting, Buffer is written directly to memory automatically.

 

 

We can conclude also this table:

/* ATA/ATAPI Read/Write Modes:

* ++++++++++++++++++++++++++++++++

* Addressing Modes:

* ================

* - CHS. (+)

* Reading Modes:

* ================

* - IRQs

*/

There is something needed to be expressed here, I have told before that Task-File is like that:

* Register 2: [Bits 0-7] SECCOUNT0, [Bits 8-15] SECOUNT1

* Register 3: [Bits 0-7] LBA0, [Bits 8-15] LBA3

* Register 4: [Bits 0-7] LBA1, [Bits 8-15] LBA4

* Register 5: [Bits 0-7] LBA2, [Bits 8-15] LBA5

When you access in CHS or LBA28, SECCOUNT0 only expresses number of sectors.

 

 

Lets go into the code:

unsigned char ide_ata_access(unsigned char direction, unsigned char drive, unsigned int lba,

unsigned char numsects, unsigned short selector, unsigned int edi) {

unsigned char lba_mode /* 0: CHS, 1:LBA28, 2: LBA48 */, dma /* 0: No DMA, 1: DMA */, cmd;

unsigned char lba_io[6];

ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN = (ide_irq_invoked = 0x0) + 0x02);

Now lets read the parameters:

// (I) Select one from LBA28, LBA48 or CHS;

if (lba >= 0x10000000) { // Sure Drive should support LBA in this case, or you are

// LBA48:

lba_mode = 2;

head = 0; // Lower 4-bits of HDDEVSEL are not used here.

// LBA28:

lba_mode = 1;

lba_io[3] = 0; // These Registers are not used here.

lba_io[4] = 0; // These Registers are not used here.

lba_io[5] = 0; // These Registers are not used here.

} else {

// CHS:

lba_mode = 0;

sect = (lba % 63) + 1;

lba_io[0] = sect;

lba_io[3] = 0;

lba_io[4] = 0;

lba_io[5] = 0;

}

Now we are going to choose the way of reading the buffer [PIO or DMA]:

// (III) Wait if the drive is busy;

* Bit 4: Slave Bit. (0: Selecting Master Drive, 1: Selecting Slave Drive).

* Bit 5: Obsolete and isn't used, but should be set.

* Bit 6: LBA (0: CHS, 1: LBA).

* Bit 7: Obsolete and isn't used, but should be set.

Lets write all these information to the register, while the obsolete bits are set (0xA0):

// (IV) Select Drive from the controller;

Let's write the parameters to registers:

// (V) Write Parameters;

if (lba_mode == 2) {

ide_write(channel, ATA_REG_LBA1, lba_io[1]);

ide_write(channel, ATA_REG_LBA2, lba_io[2]);

 

Now, we have a great set of commands described in ATA/ATAPI-8 Specification, we should choose the suitable command to execute:

// (VI) Select the command and send it;

// Routine that is followed:

// If (!DMA & LBA28) DO_PIO_LBA;

// If (!DMA & !LBA#) DO_PIO_CHS;

if (lba_mode == 0 && dma == 0 && direction == 0) cmd = ATA_CMD_READ_PIO;

if (lba_mode == 1 && dma == 0 && direction == 0) cmd = ATA_CMD_READ_PIO;

if (lba_mode == 2 && dma == 1 && direction == 1) cmd = ATA_CMD_WRITE_DMA_EXT;

ide_write(channel, ATA_REG_COMMAND, cmd); // Send the Command.

 

 

if (dma)

if (direction == 0);

else

if (direction == 0)

for (i = 0; i < numsects; i++) {

asm("pushw %es");

asm("popw %es");

edi += (words*2);

} else {

// PIO Write.

}

ATA_CMD_CACHE_FLUSH,

ATA_CMD_CACHE_FLUSH_EXT}[lba_mode]);

}

 

}

 

 

void ide_wait_irq() {

ide_irq_invoked = 0;

}

void ide_irq() {

ide_irq_invoked = 1;

}

unsigned char ide_atapi_read(unsigned char drive, unsigned int lba, unsigned char numsects,

unsigned short selector, unsigned int edi) {

Let's read the parameters of the drive:

We need IRQs:

// Enable IRQs:

ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN = ide_irq_invoked = 0x0);

// (I): Setup SCSI Packet:

// ------------------------------------------------------------------

atapi_packet[ 0] = ATAPI_CMD_READ;

atapi_packet[ 1] = 0x0;

atapi_packet[ 6] = 0x0;

atapi_packet[ 7] = 0x0;

atapi_packet[10] = 0x0;

atapi_packet[11] = 0x0;

Now we should select the drive:

// ------------------------------------------------------------------

400 nanoseconds delay after this select is a good idea:

// (III): Delay 400 nanoseconds for select to complete:

// ------------------------------------------------------------------

// (IV): Inform the Controller that we use PIO mode:

// ------------------------------------------------------------------

ide_write(channel, ATA_REG_FEATURES, 0); // PIO mode.

// (V): Tell the Controller the size of buffer:

// ------------------------------------------------------------------

ide_write(channel, ATA_REG_LBA1, (words * 2) & 0xFF); // Lower Byte of Sector Size.

// (VI): Send the Packet Command:

// ------------------------------------------------------------------

ide_write(channel, ATA_REG_COMMAND, ATA_CMD_PACKET); // Send the Command.

 

// ------------------------------------------------------------------

if (err = ide_polling(channel, 1)) return err; // Polling and return if error.

 

// (VIII): Sending the packet data:

// ------------------------------------------------------------------

// (IX): Receiving Data:

// ------------------------------------------------------------------

for (i = 0; i < numsects; i++) {

ide_wait_irq(); // Wait for an IRQ.

asm("pushw %es");

asm("mov %%ax, %%es"::"a"(selector));

asm("rep insw"::"c"(words), "d"(bus), "D"(edi));// Receive Data.

asm("popw %es");

}

// (X): Waiting for an IRQ:

// ------------------------------------------------------------------

// (XI): Waiting for BSY & DRQ to clear:

// ------------------------------------------------------------------

 

return 0; // Easy, ... Isn't it?

}

void ide_read_sectors(unsigned char drive, unsigned char numsects, unsigned int lba,

unsigned short es, unsigned int edi) {

// 1: Check if the drive presents:

// ==================================

 

// 2: Check if inputs are valid:

// ==================================

package[0] = 0x2; // Seeking to invalid position.

 

else {

unsigned char err;

err = ide_ata_access(ATA_READ, drive, lba, numsects, es, edi);

for (i = 0; i < numsects; i++)

err = ide_atapi_read(drive, lba + i, 1, es, edi + (i*2048));

}

}

void ide_write_sectors(unsigned char drive, unsigned char numsects, unsigned int lba,

unsigned short es, unsigned int edi) {

// 1: Check if the drive presents:

// ==================================

// 2: Check if inputs are valid:

// ==================================

package[0] = 0x2; // Seeking to invalid position.

// 3: Read in PIO Mode through Polling & IRQs:

else {

unsigned char err;

err = ide_ata_access(ATA_WRITE, drive, lba, numsects, es, edi);

err = 4; // Write-Protected.

package[0] = ide_print_error(drive, err);

}

}

void ide_atapi_eject(unsigned char drive) {

unsigned int words = 2048 / 2; // Sector Size in Words.

unsigned char err = 0;

// 1: Check if the drive presents:

// ==================================

// 2: Check if drive isn't ATAPI:

// ==================================

// 3: Eject ATAPI Driver:

// ============================================

// (II): Select the Drive:

// ------------------------------------------------------------------

 

// (III): Delay 400 nanosecond for select to complete:

// ------------------------------------------------------------------

 

// (IV): Send the Packet Command:

// (V): Waiting for the driver to finish or invoke an error:

// ------------------------------------------------------------------

 

// (VI): Sending the packet data:

}

package[0] = ide_print_error(drive, err); // Return;

}

}

[[Category:ATA]]