Anonymous user
PCI Express: Difference between revisions
m
Fix off-by-one error in status register changes (source: PCIe spec)
| [unchecked revision] | [unchecked revision] |
m (Fix off-by-one error in status register changes (source: PCIe spec)) |
|||
Line 34:
| 5 || 66 MHz Capable: Does not apply to PCIe. Hardwired to 0.
|-
|
|-
| 10:9 || DEVSEL Timing: Does not apply to PCIe. Hardwired to 0.
| |||