Ne2000: Difference between revisions

The '''Ne2000 network card chipset''' was a reference design that was never meant to go into mainstream production, but after Novell used it as cheap hardware to go with their software it became popular.

It is a good first network card to program because it follows a simple design (making it helpful for learning), they're probably dirt-cheap, and it is supported by most PC emulators. Both [[Bochs]] and [[QEMU]] provide ISA and PCI implementations.

Ne2000 is not technically a card, it is a standard that several implementors follow. The best available description of the initial standard iswas located [http://www.national.com/pf/DP/DP8390D.html DP8390D/NS32490D NIC Network Interface Controller] ([https://web.archive.org/web/20010612150713/http://www.national.com/ds/DP/DP8390D.pdf archive]) and was published by National Semiconductor.

The Ne2000 network card uses two ''ring buffers'' for packet handling. These are circular buffers made of 256-byte ''pages'' that the chip's [[DMA]] logic will use to store received packets or to get received packets.

Note that a packet will '''always''' start on a page boundary, thus there may be unused

Two registers <tt>PSTART</tt> and <tt>PSTOP</tt> define a set of 256-byte pages in the ''buffer memory'' that will be used for the ring buffer. As soon as the DMA attempts to read/write to <tt>PSTOP</tt>, it will be sent back to <tt>PSTART</tt>

Note that the same register number could have a different meaning depending whether you ''read'' or ''write'' to it. For instance, register 0C0x0C on page 0 is the ''receive configuration register'' in ''write'' mode and "receive status register" in ''read'' mode. Most of the ''configuration'' registers can still be read on page 2 though. Each register is a single byte and the page is selected by highest 2 bits of the COMMAND register (which is available in all pages)

Ne2K_registers (page=0, read) {

: CLDA0, COMMAND=0, //!< Currentthe Localmaster DMAcommand Address 0register

: CLDA1 CLDA0, //!< Current Local DMA Address 10

: BNRY, CLDA1, //!< BoundaryCurrent Local PointerDMA (forAddress ringbuffer)1

: TSR, BNRY, //!< TransmitBoundary Pointer Status(for Registerringbuffer)

: NCR TSR, //!< collisionsTransmit Status counterRegister

: FIFO NCR, //!< (for what purposecollisions ??)counter

: ISR, FIFO, //!< Interrupt(for what Statuspurpose Register??)

: CRDA0 ISR, //!< Current Remote DMAInterrupt AddressStatus 0Register

: CRDA1 CRDA0, //!< Current Remote DMA Address 10

: RSR=0x0c CRDA1, //!< ReceiveCurrent Remote DMA StatusAddress Register1

: PSTOP, while ((inb(nif->iobase + 0x07) & 0x80) == 0); //!< pagewait stopfor the (initRESET only)to complete

:outb(nif->iobase TPSR=4+ 0x07, 0xFF); //!< transmit page start address // mask interrupts

:outb(nif->iobase RBCR0+ 0x0A, 0); //!< remoteclear bytethe count (lo)regs

# '''<tt>COMMAND'''</tt> register set to ''"start''" and ''"nodma''" (0x22)

# '''<tt>RBCRx'''</tt> are loaded with the packet size

# ''"Remote DMA complete?''" bit is cleared by writing a 1 in bit 6 of '''<tt>ISR'''</tt> (that's odd, but that's the way it works)

# '''<tt>RSARx'''</tt> are loaded with 000x00 (low) and target page number (high) respectively. At this stage, the chip is ready receiving packet data and storing it in the ring buffer for emission.

# '''<tt>COMMAND'''</tt> register set to ''"start''" and ''"remote write DMA''" (0x12)

# Packets data is now written to the ''"data port''" (that is register 0x10) of the NIC in a loop (or using an ''"outsx''" if available). The NIC will then update its remote DMA logic after each written word16-bit value/dword32-bit value and places bytes in the transmit ring buffer.

# Poll '''<tt>ISR'''</tt> register until bit 6 (Remote DMA completed) is set.

I have configured my ne2000 card in bochs to signal interrupts on [[IRQ]] 3.

* http://www.cs.usfca.edu/~~cruse/cs326/RTL8139_[[Programmers Guide]]RTL8139_ProgrammersGuide.pdf, saved here for later use.