972
edits
Model Specific Registers: Difference between revisions
m
Bot: Replace deprecated source tag with syntaxhighlight
| [unchecked revision] | [unchecked revision] |
Artoria2e5 (talk | contribs) |
m (Bot: Replace deprecated source tag with syntaxhighlight) |
||
| (2 intermediate revisions by 2 users not shown) | |||
Line 6:
Each MSR that is accessed by the RDMSR and WRMSR group of instructions is identified by a 32-bit integer. MSRs are 64-bit wide. The presence of MSRs on your processor is indicated by [[CPUID]].01h:EDX[bit 5].
<
const uint32_t CPUID_FLAG_MSR = 1 << 5;
Line 12:
bool cpuHasMSR()
{
static uint32_t a, d; // eax, edx
cpuid(1, &a, &d);
return d & CPUID_FLAG_MSR;
Line 26:
asm volatile("wrmsr" : : "a"(lo), "d"(hi), "c"(msr));
}
</syntaxhighlight>
===Other way to access MSRs===
Line 84:
[[Category:x86 CPU]]
[[Category:CPU Registers]]
[[de:Model-Specific_Register]]
| |||