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MMX (view source)

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==MMX==
{{Floats}}
{{stub}}
=Overview=
===Introduction===
MMX is a SIMD technology (single instruction, multiple data) introduced by Intel on January 8, 1997 with thertheir P5 "Pentium" processor line named "Pentium with MMX Technology". It has been superseded by [[SSE]] and now [[AVX]].
===Detection===▼
To detect MMX
<source lang="asm">
;Check CPUID.01h EDX.MMX (EDX.23)
mov eax, 0x1 ;0x.. is not needed, but standardizes
cpuid
test edx, 1<<23 ;EDX.MMX
jnz .MMX ;If no jump MMX is not present
</source>
===Use today===
It is unlikely that you will come across any MMX code today, as it has been superceded by [[SSE]], and compilers compile SSE code. However, it may be worthwile to be aware of MMX.
 
==SeeTechnical AlsoDetails==
 
===SSE===
MMX is accessed using 8 CPU registers (MM0 to MM7). Each register is 64 bits wide and can be used to hold 64-bit integers or multiple smaller integers packed. One instruction can be applied to two 32-bit integers, four 16-bit integers, or 8 8-bit integers at once.
*[[SSE]]
 
===X87===
▲===Detection===
*[[FPU]]
 
The bit for MMX can be found on CPUID page 1, in EDX bit 23.
 
=MMX in 2021=
MMX is now an old technology that was left in the past in favour of the new technologies [[SSE]] and [[AVX]].
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