MADT: Difference between revisions

7 bytes added ,  2 years ago
m
Minor changes
[unchecked revision][unchecked revision]
m (replaced 'physical processor' to 'logical processor' : there is one local apic per logical processor ("thread") in an SMT ("hyperthreading") environment)
m (Minor changes)
Line 1:
''This page is about the ACPI MADT (Multiple APIC Description Table)'',
Itit describes how the [[APIC]] works.
==Introduction==
The MADT describes all of the interrupt controllers in the system. It can be used to enumerate the processors currently available.
Line 61:
Based on the Entry Type field value, the rest of the record layout can be determined.
 
== Entry Type 0 : Processor Local APIC ==
 
This type represents a single logical processor and its local interrupt controller.
Line 79:
If flags bit 0 is set the CPU is able to be enabled, if it is not set you need to check bit 1. If that one is set you can still enable it, if it is not the CPU can not be enabled and the OS should not try.
 
== Entry Type 1 : I/O APIC ==
 
This type represents a I/O APIC. The global system interrupt base is the first interrupt number that this I/O APIC handles. You can see how many interrupts it handles using the register by getting the number of redirection entries from register 0x01, as described in [[APIC#IO_APIC_Registers|IO APIC Registers]].
Line 97:
|}
 
== Entry Type 2 : IO/APIC Interrupt Source Override ==
 
This entry type contains the data for an Interrupt Source Override.
Line 117:
|}
 
== Entry type 3 : IO/APIC Non-maskable interrupt source ==
 
Specifies which IO/APIC interrupt inputs should be enabled as non-maskable.
Line 135:
|}
 
== Entry Type 4 : Local APIC Non-maskable interrupts ==
 
Configure these with the LINT0 and LINT1 entries in the Local vector table of the relevant processor(')s(') local APIC.
Line 151:
|}
 
== Entry Type 5 : Local APIC Address Override ==
 
Provides 64 bit systems with an override of the physical address of the Local APIC. There can only be one of these defined in the MADT. If this structure is defined, the 64-bit Local APIC address stored within it should be used instead of the 32-bit Local APIC address stored in the MADT header.
Line 165:
|}
 
== Entry Type 9 : Processor Local x2APIC ==
 
== Entry Type 9 : Processor Local x2APIC ==
 
Represents a physical processor and its Local x2APIC. Identical to Local APIC; used only when that struct would not be able to hold the required values.
Line 188 ⟶ 187:
 
Here is a diagram of the interrupt types:
 
http://i.imgur.com/HRDwoa6.png
 
== Example Code ==
{{Disputed}}
The following code snippet detects and parses MADT table to collect Local APIC data on SMP systems. Works with both [[RSDT]] and [[XSDT]], and compiles for both protected mode and long mode.
<source lang="c">
73

edits