618
edits
Interrupt Descriptor Table: Difference between revisions
m
Changed tables as with GDT
| [unchecked revision] | [unchecked revision] |
m (Changed tables as with GDT) |
|||
Line 9:
The location of the '''IDT''' is kept in the '''IDTR''' ('''IDT''' register). This is loaded using the '''LIDT''' assembly instruction, whose argument is an '''IDTR''':
{| class="wikitable
|+
!style="width: 66%; text-align: left;" |79 (64-bit Mode)<br>48 (32-bit Mode) <span style="float: right;">16</span>
!style="width: 34%; text-align: left; vertical-align: bottom;" |15 <span style="float: right;">0</span>
|-
|'''Offset'''<br>63 (64-bit Mode)<br>31 (32-bit Mode) <span style="float: right;">0</span>
|'''Size'''<br><br>15 <span style="float: right;">0</span>
|-▼
|}
Line 42 ⟶ 37:
On 32-bit processors, the entries in the '''IDT''' are 8 bytes long and form a table like this:
{|class="wikitable"
|+Interrupt Descriptor Table (32-bit)
! Address !! Content
▲|-
| IDTR Offset + 0 || Entry 0
|-
| IDTR Offset + 8 || Entry 1
|-
| IDTR Offset + 16 || Entry 2
|- style="text-align: center;"
| '''...''' || '''...'''
|-
| IDTR Offset + 2040 || Entry 255
|}
The corresponding entry for a given '''Interrupt Vector''' is pointed to in memory by scaling the vector by 8 and adding it to the value in the '''Offset''' field of the '''IDTR'''.
Line 139 ⟶ 134:
On 64-bit processors, the entries in the '''IDT''' are 16 bytes long and form a table like this:
{|class="wikitable"
|+Interrupt Descriptor Table (64-bit)
! Address !! Content
|-
| IDTR Offset + 0 || Entry 0
|-
| IDTR Offset + 16 || Entry 1
|-
| IDTR Offset + 32 || Entry 2
|- style="text-align: center;"
| '''...''' || '''...'''
|-
| IDTR Offset + 4080 || Entry 255
|}
The corresponding entry for a given '''Interrupt Vector''' is pointed to in memory by scaling the vector by 16 and adding it to the value in the '''Offset''' field of the '''IDTR'''.
| |||