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Interrupt Descriptor Table: Difference between revisions
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== IDTR ==
The location of the '''IDT''' is kept in the '''IDTR''' ('''IDT''' register). This is loaded using the '''
{| class="wikitable"
|+IDT
!style="width: 66%; text-align: left;" |79 (64-bit Mode)<br>48 (32-bit Mode) <span style="float: right;">16</span>
!style="width: 34%; text-align: left; vertical-align: bottom;" |15 <span style="float: right;">0</span>
|-
|'''Offset'''<br>63 (64-bit Mode)<br>31 (32-bit Mode) <span style="float: right;">0</span>
|'''Size'''<br><br>15 <span style="float: right;">0</span>
|}
* '''Size''': One less than the size of the '''IDT''' in bytes.
* '''Offset''': The linear address of the '''Interrupt Descriptor Table''' (not the physical address, paging applies).
Note that the amount of data loaded by '''
This is similar to the '''[[GDT]]''', except:
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On 32-bit processors, the entries in the '''IDT''' are 8 bytes long and form a table like this:
{|class="wikitable"
|+Interrupt Descriptor Table (32-bit)
! Address !! Content
|-
| IDTR Offset + 0 || Entry 0
|-
| IDTR Offset + 8 || Entry 1
|-
| IDTR Offset + 16 || Entry 2
|- style="text-align: center;"
| '''...''' || '''...'''
|-
| IDTR Offset + 2040 || Entry 255
|}
The corresponding entry for a given '''Interrupt Vector''' is pointed to in memory by scaling the vector by 8 and adding it to the value in the '''Offset''' field of the '''IDTR'''.
===
Each entry in the table has a complex structure:
{| class="wikitable"
|+Gate Descriptor (32-bit):
!style="width: 50%; text-align: left;"|63 <span style="float: right;">48</span>
!style="width: 3.125%"|47
!style="width: 6.25%; text-align: left;"|46 <span style="float: right;">45</span>
!style="width: 3.125%"|44
!style="width: 12.5%; text-align: left;"|43 <span style="float: right;">40</span>
!style="width: 25%; text-align: left;"|39 <span style="float: right;">32</span>
|-
|'''Offset'''<br>31 <span style="float: right;">16</span>
|style="text-align: center; vertical-align: top;"|'''P'''
|'''DPL'''<br>1 <span style="float: right;">0</span>
|style="text-align: center; vertical-align: top;"|0
|'''Gate Type'''<br>3 <span style="float: right;">0</span>
|style="vertical-align:top"|Reserved
|-
!style="text-align: left;" |31 <span style="float: right;">16</span>
!style="text-align: left;" colspan="5" |15 <span style="float: right;">0</span>
|-
|'''Segment Selector'''<br>15 <span style="float: right;">0</span>
|colspan="5" |'''Offset'''<br>15 <span style="float: right;">0</span>
|}
* '''Offset:''' A 32-bit value, split in two parts. It represents the address of the entry point of the '''[[Interrupt Service Routines|Interrupt Service Routine]]'''.
* '''Selector:''' A
* '''Gate Type:''' A 4-bit value which defines the type of gate this '''Interrupt Descriptor''' represents. There are five valid type values:
** '''0b0101''' or '''0x5''': Task Gate, note that in this case, the '''Offset''' value is unused and should be set to zero.
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* '''P:''' Present bit. Must be set ('''1''') for the descriptor to be valid.
For more information, see '''Section 6.11: IDT Descriptors''' and '''Figure 6-2: IDT Gate Descriptors''' of the [https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.html Intel Software Developer Manual, Volume 3-A].
=== Example Code ===
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C Struct:
<
struct InterruptDescriptor32 {
uint16_t offset_1; // offset bits 0..15
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uint16_t offset_2; // offset bits 16..31
};
</syntaxhighlight>
Example ''type_attributes'' values that people are likely to use (assuming DPL is 0):
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On 64-bit processors, the entries in the '''IDT''' are 16 bytes long and form a table like this:
{|class="wikitable"
|+Interrupt Descriptor Table (64-bit)
! Address !! Content
|-
| IDTR Offset + 0 || Entry 0
|-
| IDTR Offset + 16 || Entry 1
|-
| IDTR Offset + 32 || Entry 2
|- style="text-align: center;"
| '''...''' || '''...'''
|-
| IDTR Offset + 4080 || Entry 255
|}
The corresponding entry for a given '''Interrupt Vector''' is pointed to in memory by scaling the vector by 16 and adding it to the value in the '''Offset''' field of the '''IDTR'''.
===
Each entry in the table has a complex structure:
{| class="wikitable"
|+Gate Descriptor (64-bit):
!colspan="7" style="text-align: left;"|127 <span style="float: right;">96</span>
|-
|colspan="7" |Reserved
|-
!colspan="7" style="text-align: left;"|95 <span style="float: right;">64</span>
|-
|colspan="7" |'''Offset'''<br>63 <span style="float: right;">32</span>
|-
!style="width: 50%; text-align: left;"|63 <span style="float: right;">48</span>
!style="width: 3.125%"|47
!style="width: 6.25%; text-align: left;"|46 <span style="float: right;">45</span>
!style="width: 3.125%"|44
!style="width: 12.5%; text-align: left;"|43 <span style="float: right;">40</span>
!style="width: 15.625%; text-align: left;"|39 <span style="float: right;">35</span>
!style="width: 9.375%; text-align: left;"|34 <span style="float: right;">32</span>
|-
|'''Offset'''<br>31 <span style="float: right;">16</span>
|style="text-align: center; vertical-align: top;"|'''P'''
|'''DPL'''<br>1 <span style="float: right;">0</span>
|style="text-align: center; vertical-align: top;"|0
|'''Gate Type'''<br>3 <span style="float: right;">0</span>
|style="vertical-align:top"|Reserved
|'''IST'''<br>2 <span style="float: right;">0</span>
|-
!style="text-align: left;" |31 <span style="float: right;">16</span>
!style="text-align: left;" colspan="6" |15 <span style="float: right;">0</span>
|-
|'''Segment Selector'''<br>15 <span style="float: right;">0</span>
|colspan="6" |'''Offset'''<br>15 <span style="float: right;">0</span>
|}
* '''Offset:''' A 64-bit value, split in three parts. It represents the address of the entry point of the '''[[Interrupt Service Routines|Interrupt Service Routine]]'''.
* '''Selector:''' A
* '''IST:''' A 3-bit value which is an offset into the '''Interrupt Stack Table''', which is stored in the '''[[Task State Segment]]'''. If the bits are all set to zero, the '''Interrupt Stack Table''' is not used.
* '''Gate Type:''' A 4-bit value which defines the type of gate this '''Interrupt Descriptor''' represents. In long mode there are two valid type values:
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C Struct:
<
struct InterruptDescriptor64 {
uint16_t offset_1; // offset bits 0..15
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uint32_t zero; // reserved
};
</syntaxhighlight>
Example ''type_attributes'' values that people are likely to use (assuming DPL is 0):
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=== Interrupt Gate ===
An '''Interrupt Gate''' is used to specify an '''[[Interrupt Service Routines|Interrupt Service Routine]]'''. For example, when the assembly instruction '''INT 50''' is performed while running in protected mode, the CPU looks up the 50th entry (located at 50 * 8) in the '''IDT'''. Then the Interrupt Gate's '''Selector''' and '''Offset''' values are loaded. The '''Selector''' and '''Offset''' are used to call the '''Interrupt Service Routine'''. When the '''IRET''' instruction is performed, the CPU returns from the interrupt. If the CPU was running in 32-bit mode and the specified selector is a 16-bit gate, then the CPU will go in 16-bit
=== Trap Gate ===
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