Instruction Set Architecture: Difference between revisions

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This page is intended to provide an explanation of the various instruction set architecture principles such as Complex Instruction Set, Reduced Instruction Set, Writable Instruction Set, Single Instruction Set, etc. The instruction sets are named beginning with the simplest toward the complexestmost complex set.<br>
See also [[Historical Notes on CISC and RISC]].
 
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As you might have noticed everything can be implemented by logic functions. This is important: To be able to do any logic function means to be Church-Turing mighty.
 
To be exact only a single logic function, such as [[wikipedia:Sheffer stroke|NAND]], with two inputs and one output is needed. Other sets of "complete" logic functions can be found, but the most commonNAND is the NANDmost functioncommon.
 
Any Instruction Set Architecture (ISA) is Church-Turing mighty.
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==One Instruction Set==
 
The so called Ultimate Reduced Instruction Set Computer (URISC) or One Instruction Set Computer (OISC) is programmed by only one instruction. This instruction must be possible however to decide, to move data, to jump to different targets in the instruction stream and to calculate. This is only possible with a complex instruction.<br>
Applications for a computer programmed by this ISA have a huge-sized code, so that this ISA is only of theoretical interest. For further information refer to [[wikipedia:One instruction set computer|One instruction set computer]] on Wikipedia.
 
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A CISC instantiates simple and additional complex instructions. It comes mostly with different execution environments and security features. Especially streaming extensions like SSE must be named.
They are the reason why RISC-only processors almost disappeared nowadays. Flynn's bottleneck applies, but by using streaming extensions the chance to reduce its influence and switch to Fisher's optimism grows fast. Other advanced features may reduce memory accesses and therefore idle times of the CPU. Clearly the advantage of the CISC architectures are their capabilities, but that complexity is a disadvantage as well and can result in serious security issues that it needs to handle. CISC architectures such as [[wikipedia:Motorola 68000 series|M68K]] or [[wikipedia:MOS Technology 6502|6502]] were common in the early days of computing, when optimising compiler technology was less advanced. A CISC architecture still in use is x86 (including x86_64).
 
==Hybrid Instruction Set==