Historical Notes on CISC and RISC: Difference between revisions

→‎Footnotes: Tidy-up and a couple of little extras
[unchecked revision][unchecked revision]
(Added Wikipedia links for different architectures)
(→‎Footnotes: Tidy-up and a couple of little extras)
Line 33:
== Footnotes ==
 
===One Instruction Set Computers===
===oisc===
In principle, only a single operation, 'subtract two memory values and branch if the result is negative' (or several variants on this) is sufficient to allow a Random Access Machine to perform all Turing-computable calculations). There are even (simulated) machines which are designed on this principle,. such(Such asmachines are often named after the instruction they implement or, confusingly, OISC.) In practice, of course, such a system would be both tedious and wasteful, especially for the more commonly used operations such as integer arithmetic. This has not stopped the appearance of at least one operating system for such an architecture, complete with its own C compiler: [[Projects#D|Dawn]].
 
===segmentationSegmentation===
The specific issue is the use of 'memory segmentation', which was intended to provide a 20-bit address space while still only using 16-bit addressing for most purposes. It worked by having a separate set of segment registers, which pointed to 64K regions overlapping each other at 16-byte intervals. The addresses are formed by taking the segment address and a 16-bit offset, which are equivalent to the 8080's addresses, adding the two values with a 4-bit displacement to get the 20-bit address. Most instructions could use one of the segment registers as a default value for code or data, and use just the offsets in the instruction stream. The particular overlap was set at 4 bits because using more than 20 address pins was determined to be prohibitively expensive at the time, and would make the Dual-Inline Package design too large. It was assumed that a 1 MiB address space would be sufficient for a CPU meant as a microcontroller with a limited design lifespan rather than a general-purpose system that would be in use 40 years later. This segmentation system persists as 'Real mode' even in current x86 models. (Segmentation exists even in 32-bit mode, although the segment registers remain 16-bit. Clever uses are occasionally found for it.)
 
===powerpcPowerPC===
usedPowerPC inwas a modified formPOWER as the PowerPCarchitecture, which was used in MacintoshenMacintoshes from 1994 to 2006 and in some IBM OS/2 systems from 1992 to 1996. The POWER architecture itself is primarily used in larger multiprocessor systems such as [https://en.wikipedia.org/wiki/Deep_Blue_(chess_computer) Deep Blue] and [https://en.wikipedia.org/wiki/Watson_(computer) Watson].
 
used in modified form as the PowerPC, which was used in Macintoshen from 1994 to 2006 and in some IBM OS/2 systems from 1992 to 1996. The POWER architecture itself is primarily used in larger multiprocessor systems such as [https://en.wikipedia.org/wiki/Deep_Blue_(chess_computer) Deep Blue] and [https://en.wikipedia.org/wiki/Watson_(computer) Watson].
Anonymous user