Historical Notes on CISC and RISC: Difference between revisions

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This last part had some major repercussions, especially regarding some of the design decisions as microprocessors became more powerful. Chief amongst these was the decision by Intel to try and extend the 8-bit [https://en.wikipedia.org/wiki/Intel_8080 8080] design into a new 16-bit design, the [https://en.wikipedia.org/wiki/Intel_8086 8086]; they bent over backwards to make the CPU as familiar as possible to programmers of the older chip, with the result that the design ended up with some unnecessary complications and limitations, especially in how it addresses larger sections of memory<sup>[[Historical Notes on CISC and RISC#segmentation|2]]</sup> Also, because the designers had given the system only a small number of registers, most of the operations have several complicated addressing modes to avoid running out of registers.
 
The fact that this processor was selected for the IBM PC, which would soon become the dominant platform, meant that these weaknesses were of critical importance to millions of users. This was further exacerbated when they extended the design still further with the [https://en.wikipedia.org/wiki/Intel_80286 80286], which now needed a separate 'protected mode' to access its full abilities while retaining 'normal mode' for backwards compatibility. Some of the design flaws were resolved in the next design, the [https://en.wikipedia.org/wiki/Intel_80386 80386], but at the cost of exponentially increasing complexity both of the chip itself and of assembly programming for it.
 
Meanwhile, other chip designers were going in other directions. One, Motorola, started over with a classic 'big' design, the [https://en.wikipedia.org/wiki/Motorola_68000 Motorola 68000], which resembled a scaled-down version of the VAX in many ways, with 16 general-purpose registers and a complicated instruction set. This would become the CPU for several successful workstations, as well as the original [https://en.wikipedia.org/wiki/Macintosh Apple Macintosh], [https://en.wikipedia.org/wiki/Atari_ST Atari ST], and [https://en.wikipedia.org/wiki/Amiga Commodore Amiga] home computer linelines. Later design extensions would complicate this, though not to the extent that the 80x86 design would be.
 
Still, it was growing clear that the complex instruction sets were growing counter-productive. Thus, many chip designers decided to go in the opposite direction: minimal instruction sets, no microcoding, load/store architectures with few if any operations working on memory directly, large register sets which could be used to avoid accessing main memory whenever possible, and an emphasis on supporting high-level languages rather than assembly programing. This new idea, which was called RISC (reduced instruction set computer), would be the basis several new CPU designs, including the [https://en.wikipedia.org/wiki/MIPS_instruction_set MIPS] (and it's successor the [https://en.wikipedia.org/wiki/DLX DLX]), the [https://en.wikipedia.org/wiki/SPARC Sun SPARC], the [https://en.wikipedia.org/wiki/ARM_architecture Acorn ARM], the IBM [https://en.wikipedia.org/wiki/IBM_POWER_microprocessors POWER] architecture<sup>[[Historical Notes on CISC and RISC#powerpc|3]]</sup>, which, and the [https://en.wikipedia.org/wiki/DEC_Alpha DEC Alpha]. Of these, all but the Alpha remain in use today for certain specialized areas of use, and the ARM in particular has become the ''de facto'' standard for mobile computing, though for the most part the domination by the Windows-x86 system has forced them out of the market for home and business systems.
 
== Footnotes ==
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