Higher Half Kernel: Difference between revisions

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It is traditional and generally good to have your kernel mapped in every user process. Linux and many other Unices, for instance, reside at virtual addresses ''0xC0000000 – 0xFFFFFFFF'' of every address space, leaving the range ''0x00000000 – 0xBFFFFFFF'' for user code, data, stacks, libraries, etc. Kernels that have such design are said to be "in the higher half" by opposition to kernels that use lowest virtual addresses for themselves, and leave higher addresses for the applications.
 
In addition, there is at least onesome non-x86 ISA (the [[MIPS Overview|MIPS]] [[User:Schol-r-lea/Understanding RISC vs CISC|RISC architecture]] and [[AArch64|ARM]]) which partly forces the issue. On MIPS and ARM systems, addresses using the high bit (either bit 31 or bit 63, depending on the system word width) are reserved for use in Supervisor mode, and are exception trapped when in User mode.
 
Advantages of a higher half kernel are:
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== Bootloader support ==
To make things easier, some bootloaders natively support higher half kernels, by directly loading and mapping a kernel to the higher half in virtual memory.
 
* [[BOOTBOOT]] only supports higher half kernels by design. It has example Hello World kernels written in [[C]], [[Pascal]], [[Rust]] and [[Go]]
* The [[Limine]] directlyprotocol supportalso loadingonly a kernel to thesupport higher half inkernels virtualby memorydesign. See [[stivaleLimine Bare Bones]] for a tutorial on how to write a simple 64-bit higher half kernel withusing Limine and stivale.
 
== Initialization ==
To setup a higher half kernel, you have to map your kernel to the appropriate virtual address. When using a boot protocol which supports higher half kernels directly, such as [[stivaleBOOTBOOT]], or [[Limine]], your kernel will already be properly mapped.
 
How to do this basically depends on '''when''' you'd like your kernel to believe it's in the higher end, and '''when''' you set up paging. Without a boot loader help, you'll need a small trampoline code which runs in lower half, sets up higher half paging and jumps.
 
== See Also ==
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=== Articles ===
* [[Higher Half x86 Bare Bones]]
* [[stivale Bare Bones]]
 
=== Threads ===