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Revision as of 08:51, 8 February 2021 (view source) osdev>Aristos m (→‎HPET registers: "0x000 - 000x7" -> "0x000 - 0x007") ← Older edit		Latest revision as of 05:23, 9 June 2024 (view source) Xtex (talk \| contribs) m (Bot: Replace deprecated source tag with syntaxhighlight)
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Line 1: :''This page is not meant as a full description of HPET, only as a lightweight introduction. If you need any information not covered by this article, consult the [http://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/software-developers-hpet-spec-1-0a.pdf HPET specification].'' '''HPET''', or High Precision Event Timer, is a piece of hardware designed by Intel and Microsoft to replace older [[PIT]] and [[RTC]]. It consists of (usually 64-bit) main counter (which counts up), as well as from 3 to 32 32-bit or 64 -bit wide comparators. HPET is programmed using memory mapped IO, and the base address of HPET can be found using [[ACPI]]. ==Detecting HPET using ACPI== The [http://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/software-developers-hpet-spec-1-0a.pdf HPET specification] defines an ACPI 2.0 table that is to be used to detect presence, address and capabilities of HPET present in the system. If this table doesn't exist, you should assume there is no HPET and you should fall back to [[PIT]] or the [[APIC timer]]. <~~source~~syntaxhighlight lang="cpp"> struct address_structure { Line 43: uint8_t page_protection; } __attribute__((packed)); </syntaxhighlight> ~~</source>~~ ==HPET - timer vs comparators== Line 297: General initialization: 1. Find HPET base address in 'HPET' ACPI table. 2. Calculate HPET frequency (f = 10^15 / period). 3. Save minimal tick (either from ACPI table or configuration register). 4. Initialize comparators. 5. Set ENABLE_CNF bit. Timer N initialization: 1. Determine if timer N is periodic capable, save that information to avoid re-reading it every time. 2. Determine allowed interrupt routing for current timer and allocate an interrupt for it. Line 317 ⟶ 324: To enable one-shot mode: <~~source~~syntaxhighlight lang="cpp"> // "time" is time in femtoseconds from now to interrupt if (time < COUNTER_CLK_PERIOD) Line 326 ⟶ 333: write_register_64(timer_configuration(n), (ioapic_input << 9) \| (1 << 2)); write_register_64(timer_comparator(n), read_register(main_counter) + time); </syntaxhighlight> ~~</source>~~ I hope the above code is obvious. If it's not, please analyze the meaning of specific fields in registers used above. Line 334 ⟶ 341: To enable periodic mode: <~~source~~syntaxhighlight lang="cpp"> // "time" is time in femtoseconds from now to interrupt if (time < COUNTER_CLK_PERIOD) Line 344 ⟶ 351: write_register_64(timer_comparator(n), read_register(main_counter) + time); write_register_64(timer_comparator(n), time); </syntaxhighlight> ~~</source>~~ This snippet requires some more comments. Line 359 ⟶ 366: ==See also== * [[IOAPIC]] * [[APIC]] * [[APIC timer]] * [[PIT]] * [[RTC]] Line 369 ⟶ 378: [[Category:Common Devices]] [[Category:Interrupts]] [[Category:~~Time~~Timers]]