GDT Tutorial: Difference between revisions

InOn the [[:Category:x86IA32_Architecture_Family|IntelIA-32]] Architectureand [[X86-64|x86-64]] architectures, and more precisely in '''[[protectedProtected modeMode]],''' most of theor '''[[memoryLong managementMode]] and''', [[Interrupt Service Routines]] and a good deal of [[memory management]] are controlled through tables of descriptors. Each descriptor stores information about a single object (e.g. a service routine, a task, a chunk of code or data, whatever) the CPU might need at some time. If you try, for instance, to load a new value into a '''[[SegmentSegmentation|segmentSegment registerRegister]]''', the CPU needs to perform safety and access control checks to see whether you're actually entitled to access that specific memory area. Once the checks are performed, useful values (such as the lowest and highest addresses) are cached in invisible CPU registers of the CPU.

IntelOn definedthese 3architectures, typesthere are three of tablesthis type of table: theThe '''[[InterruptGlobal Descriptor Table]] (which supplants''', the '''[[IVTLocal Descriptor Table]]),''' and the Global'''[[Interrupt Descriptor Table ([[GDT]])''' and(which supplants the Local'''[[Interrupt DescriptorVector Table]]'''). Each table is defined asusing atheir (size, and '''[[linear address]])''' to the CPU through the <tt>LIDT</tt>, <tt>'''LGDT</tt>''', <tt>'''LLDT</tt>''', and '''LIDT''' instructions respectively. In mostalmost all use cases, thethese OStables simplyare tellsonly whereplaced thoseinto tables arememory once, at boot time, and then simplyedited goes writing/reading the tables throughlater awhen pointerneeded.

; '''[[Segmentation|Segment]]'''

: aA logically contiguous chunk of memory with consistent properties (from the CPU's speakingperspective).

; '''Segment Register'''

: aA register of your CPU that refers to a segment for a specialparticular usepurpose (e.g.'''CS''', <tt>SS</tt>'''DS''', <tt>CS</tt>'''SS''', <tt>DS</tt>'''ES''') or for general use ('''FS''', ...'''GS''')

; '''[[Segment Selector]]'''

: aA reference to a descriptor, which you can load into a segment register; the selector is an offset ofinto a descriptor table entry.pointing to one of its entries. These entries are typically 8 bytes long, therefore selectorsbits can3 haveand valuesup 0x00,only 0x08declare the descriptor table entry offset, 0x10while bit 2 specifies if this selector is a GDT or LDT selector (LDT - bit set, 0x18GDT - bit cleared), and bits 0 - 1 declare the ring level that needs to correspond to the descriptor table entry's DPL field.. If it doesn't, a General Protection Fault occurs; if it does correspond then the CPL level of the selector used is changed accordingly.

: An entry in a memorydescriptor structuretable. (partThese ofare a table)binary data structure that tells the CPU the attributes of a given segment.

== What shouldto iPut putIn in mya GDT? ==

For sanitythe purposesake of sanity, you should always have these items stored in your GDT:

* TheEntry null0 in a descriptor whichtable, or the '''Null Descriptor''', is never referenced by the processor, and should always contain no data. Certain emulators, like Bochs, will complain about limit exceptions if you do not have one present. Some use this descriptor to store a pointer to the GDT itself (to use with the LGDT instruction). The null descriptor is 8 bytes wide and the pointer is 6 bytes wide so it might just be the perfect place for this.

* A codeDPL segment0 '''Code Segment''' descriptor (for your kernel, it should have type=0x9A)

* A data'''Data segmentSegment''' descriptor (you can't writewriting to a code segment, so addsegments thisis withnot type=0x92allowed)

* A '''[[TSSTask State Segment]]''' segment descriptor (trust me,its keepvery auseful placeto forhave at least one)

=== SysenterFlat /Sysexit Long Mode Setup ===

=== FlatSmall Kernel Setup ===

=== FillingHow theto tableSet Up The GDT ===

if ((source.limit > 655360xFFFFF) && {kerror(source.limit"GDT &cannot 0xFFF)encode !=limits 0xFFFlarger than 0xFFFFF")) {;}

target[6] |= (source.limit >> 16) & 0xF0x0F;

// Encode the base

// And...Encode Typethe access byte

target[5] = source.typeaccess_byte;

==== FromProtected flatMode, protectedFlat modeModel ====

"Flat" meaning the base of your dataData segmentSegment is 0 (regardless of whether paging'''[[Paging]]''' is on or offenabled). This is the case if you'reyour code has just been booted by [[GRUB]], for instance. IIn the 'll''[[System assumeV youABI]]''', callarguments are passed on reverse order in the stack, so a function that can be called as <tt>setGdt(GDTlimit, sizeof(GDT)base)</tt> might look like the following example code.

<sourcesyntaxhighlight lang="asm">

MOV EAXAX, [esp + 4]

MOVLGDT AX, [ESP + 8gdtr]

==== FromLong non-flat protected modeMode ====

MOV AX, 0x10 ; 0x10 pointsis ata thestand-in newfor your data selectorsegment

== What is theThe IDT and iswhy it's needed? ==

The IDT will be one of the first things to be enabled in your kernel sequence, so that you can catch hardware exceptions, listen to external events, etc. See [[Interrupts for dummies]] for more information about the interrupts of X86 family.

== Some stuff to make your life easy ==

<sourcesyntaxhighlight lang="c">