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CPU Registers x86: Difference between revisions
Fixed GPRs
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(→DR6) |
(Fixed GPRs) |
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Line 34:
| dl
| data
|-▼
| esi▼
| si▼
| N/A
| N/A
| source index▼
|-▼
| edi▼
| di▼
| N/A
| N/A
| destination index▼
|-▼
| ebp▼
| bp▼
| N/A
| N/A
| base pointer▼
|-▼
| esp▼
| sp▼
| N/A
| N/A
| stack pointer▼
|-▼
|}▼
==Pointer Registers==▼
{| {{wikitable}}▼
|-▼
! 32 bit▼
! 16 bit▼
! description▼
|-▼
| eip▼
| ip
| instruction pointer▼
|-
|}
Line 57 ⟶ 95:
|-
| fs
|
|-
| gs
|
▲|-
▲|}
▲{| {{wikitable}}
▲|-
▲! 32 bit
▲! 16 bit
▲! description
▲|-
▲| esi
▲| si
▲| source index
▲|-
▲| edi
▲| di
▲| destination index
▲|-
▲==Pointer Registers==
▲|-
▲|-
▲| ebp
▲| bp
▲| base pointer
▲| esp
▲| sp
▲| stack pointer
▲| eip
▲| instruction pointer
|-
|}
| |||