CPUID: Difference between revisions

→‎Checking CPUID availability: increase comment quality
[unchecked revision][unchecked revision]
(→‎Checking CPUID availability: increase comment quality)
Line 10:
 
<source lang="asm">
pushfd pushfd ; preserve EFLAGS to restore ;Saveat EFLAGSthe end of routine
 
pushfd ;Store EFLAGS
pushfd xor dword [esp],0x00200000 ;Invert the ID bit in stored ; store EFLAGS (working copy)
xor dword [esp], 0x00200000 popfd ; invert ID bit in our copy ;Load storedof EFLAGS (with ID bit inverted)
popfd pushfd ; attempt storing ;Store_altered_ EFLAGS again (ID bit may or may not be inverted)
 
pop eax ;eax = modified EFLAGS (ID bit may or may not be inverted)
pushfd xor eax,[esp] ;eax =Store EFLAGS again (ID bit may or whichevermay bitsnot werebe changedinverted)
pop eax popfd ; eax = modified EFLAGS (ID ;Restorebit originalmay EFLAGSor may not be inverted)
xor eax, [esp] and eax,0x00200000 ; eax = zerowhichever ifbits ID bit can't bewere changed, else non-zero
 
ret
popfd pushfd ; restore ;Storeoriginal EFLAGS
and eax, 0x00200000 ; eax = zero if ID bit can't be changed, else non-zero
ret
</source>
 
Line 25 ⟶ 28:
 
Note 2: You can simply attempt to execute the CPUID instruction and see if you get an invalid opcode exception. This avoids problems with CPUs that do support CPUID but don't support the ID bit in EFLAGS; and is likely to be faster for CPUs that do support CPUID (and slower for CPUs that don't).
 
 
 
=== Basic usage ===
4

edits